mirror of
https://github.com/ioquake/jedi-academy.git
synced 2024-11-22 12:22:23 +00:00
325 lines
7.2 KiB
C
325 lines
7.2 KiB
C
/**
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* GAS syntax equivalents of the MSVC asm memory calls in common.c
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*
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* The following changes have been made to the asm:
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* 1. Registers are loaded by the inline asm arguments when possible
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* 2. Labels have been changed to local label format (0,1,etc.) to allow inlining
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*
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* HISTORY:
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* AH - Created on 08 Dec 2000
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*/
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#include <unistd.h> // AH - for size_t
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#include <string.h>
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#include "../game/q_shared.h"
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// bk001207 - we need something under Linux, too. Mac?
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#if 1 // defined(C_ONLY) // bk010102 - dedicated?
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void Com_Memcpy (void* dest, const void* src, const size_t count) {
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memcpy(dest, src, count);
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}
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void Com_Memset (void* dest, const int val, const size_t count) {
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memset(dest, val, count);
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}
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#else
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typedef enum {
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PRE_READ, // prefetch assuming that buffer is used for reading only
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PRE_WRITE, // prefetch assuming that buffer is used for writing only
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PRE_READ_WRITE // prefetch assuming that buffer is used for both reading and writing
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} e_prefetch;
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void Com_Prefetch (const void *s, const unsigned int bytes, e_prefetch type);
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void _copyDWord (unsigned int* dest, const unsigned int constant, const unsigned int count) {
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// MMX version not used on standard Pentium MMX
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// because the dword version is faster (with
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// proper destination prefetching)
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__asm__ __volatile__ ("
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//mov eax,constant // eax = val
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//mov edx,dest // dest
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//mov ecx,count
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movd %%eax, %%mm0
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punpckldq %%mm0, %%mm0
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// ensure that destination is qword aligned
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testl $7, %%edx // qword padding?
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jz 0f
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movl %%eax, (%%edx)
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decl %%ecx
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addl $4, %%edx
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0: movl %%ecx, %%ebx
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andl $0xfffffff0, %%ecx
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jz 2f
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jmp 1f
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.align 16
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// funny ordering here to avoid commands
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// that cross 32-byte boundaries (the
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// [edx+0] version has a special 3-byte opcode...
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1: movq %%mm0, 8(%%edx)
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movq %%mm0, 16(%%edx)
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movq %%mm0, 24(%%edx)
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movq %%mm0, 32(%%edx)
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movq %%mm0, 40(%%edx)
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movq %%mm0, 48(%%edx)
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movq %%mm0, 56(%%edx)
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movq %%mm0, (%%edx)
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addl $64, %%edx
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subl $16, %%ecx
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jnz 1b
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2:
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movl %%ebx, %%ecx // ebx = cnt
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andl $0xfffffff0, %%ecx // ecx = cnt&~15
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subl %%ecx, %%ebx
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jz 6f
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cmpl $8, %%ebx
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jl 3f
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movq %%mm0, (%%edx)
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movq %%mm0, 8(%%edx)
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movq %%mm0, 16(%%edx)
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movq %%mm0, 24(%%edx)
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addl $32, %%edx
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subl $8, %%ebx
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jz 6f
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3: cmpl $4, %%ebx
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jl 4f
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movq %%mm0, (%%edx)
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movq %%mm0, 8(%%edx)
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addl $16, %%edx
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subl $4, %%ebx
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4: cmpl $2, %%ebx
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jl 5f
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movq %%mm0, (%%edx)
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addl $8, %%edx
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subl $2, %%ebx
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5: cmpl $1, %%ebx
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jl 6f
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movl %%eax, (%%edx)
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6:
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emms
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"
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: : "a" (constant), "c" (count), "d" (dest)
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: "%ebx", "%edi", "%esi", "cc", "memory");
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}
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// optimized memory copy routine that handles all alignment
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// cases and block sizes efficiently
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void Com_Memcpy (void* dest, const void* src, const size_t count) {
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Com_Prefetch (src, count, PRE_READ);
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__asm__ __volatile__ ("
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pushl %%edi
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pushl %%esi
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//mov ecx,count
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cmpl $0, %%ecx // count = 0 check (just to be on the safe side)
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je 6f
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//mov edx,dest
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movl %0, %%ebx
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cmpl $32, %%ecx // padding only?
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jl 1f
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movl %%ecx, %%edi
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andl $0xfffffe00, %%edi // edi = count&~31
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subl $32, %%edi
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.align 16
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0:
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movl (%%ebx, %%edi, 1), %%eax
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movl 4(%%ebx, %%edi, 1), %%esi
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movl %%eax, (%%edx, %%edi, 1)
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movl %%esi, 4(%%edx, %%edi, 1)
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movl 8(%%ebx, %%edi, 1), %%eax
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movl 12(%%ebx, %%edi, 1), %%esi
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movl %%eax, 8(%%edx, %%edi, 1)
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movl %%esi, 12(%%edx, %%edi, 1)
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movl 16(%%ebx, %%edi, 1), %%eax
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movl 20(%%ebx, %%edi, 1), %%esi
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movl %%eax, 16(%%edx, %%edi, 1)
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movl %%esi, 20(%%edx, %%edi, 1)
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movl 24(%%ebx, %%edi, 1), %%eax
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movl 28(%%ebx, %%edi, 1), %%esi
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movl %%eax, 24(%%edx, %%edi, 1)
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movl %%esi, 28(%%edx, %%edi, 1)
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subl $32, %%edi
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jge 0b
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movl %%ecx, %%edi
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andl $0xfffffe00, %%edi
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addl %%edi, %%ebx // increase src pointer
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addl %%edi, %%edx // increase dst pointer
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andl $31, %%ecx // new count
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jz 6f // if count = 0, get outta here
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1:
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cmpl $16, %%ecx
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jl 2f
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movl (%%ebx), %%eax
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movl %%eax, (%%edx)
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movl 4(%%ebx), %%eax
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movl %%eax, 4(%%edx)
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movl 8(%%ebx), %%eax
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movl %%eax, 8(%%edx)
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movl 12(%%ebx), %%eax
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movl %%eax, 12(%%edx)
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subl $16, %%ecx
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addl $16, %%ebx
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addl $16, %%edx
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2:
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cmpl $8, %%ecx
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jl 3f
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movl (%%ebx), %%eax
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movl %%eax, (%%edx)
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movl 4(%%ebx), %%eax
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subl $8, %%ecx
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movl %%eax, 4(%%edx)
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addl $8, %%ebx
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addl $8, %%edx
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3:
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cmpl $4, %%ecx
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jl 4f
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movl (%%ebx), %%eax // here 4-7 bytes
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addl $4, %%ebx
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subl $4, %%ecx
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movl %%eax, (%%edx)
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addl $4, %%edx
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4: // 0-3 remaining bytes
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cmpl $2, %%ecx
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jl 5f
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movw (%%ebx), %%ax // two bytes
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cmpl $3, %%ecx // less than 3?
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movw %%ax, (%%edx)
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jl 6f
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movb 2(%%ebx), %%al // last byte
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movb %%al, 2(%%edx)
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jmp 6f
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5:
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cmpl $1, %%ecx
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jl 6f
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movb (%%ebx), %%al
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movb %%al, (%%edx)
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6:
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popl %%esi
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popl %%edi
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"
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: : "m" (src), "d" (dest), "c" (count)
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: "%eax", "%ebx", "%edi", "%esi", "cc", "memory");
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}
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void Com_Memset (void* dest, const int val, const size_t count)
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{
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unsigned int fillval;
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if (count < 8)
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{
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__asm__ __volatile__ ("
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//mov edx,dest
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//mov eax, val
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movb %%al, %%ah
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movl %%eax, %%ebx
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andl $0xffff, %%ebx
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shll $16, %%eax
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addl %%ebx, %%eax // eax now contains pattern
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//mov ecx,count
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cmpl $4, %%ecx
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jl 0f
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movl %%eax, (%%edx) // copy first dword
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addl $4, %%edx
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subl $4, %%ecx
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0: cmpl $2, %%ecx
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jl 1f
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movw %%ax, (%%edx) // copy 2 bytes
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addl $2, %%edx
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subl $2, %%ecx
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1: cmpl $0, %%ecx
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je 2f
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movb %%al, (%%edx) // copy single byte
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2:
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"
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: : "d" (dest), "a" (val), "c" (count)
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: "%ebx", "%edi", "%esi", "cc", "memory");
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return;
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}
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fillval = val;
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fillval = fillval|(fillval<<8);
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fillval = fillval|(fillval<<16); // fill dword with 8-bit pattern
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_copyDWord ((unsigned int*)(dest),fillval, count/4);
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__asm__ __volatile__ (" // padding of 0-3 bytes
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//mov ecx,count
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movl %%ecx, %%eax
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andl $3, %%ecx
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jz 1f
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andl $0xffffff00, %%eax
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//mov ebx,dest
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addl %%eax, %%edx
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movl %0, %%eax
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cmpl $2, %%ecx
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jl 0f
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movw %%ax, (%%edx)
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cmpl $2, %%ecx
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je 1f
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movb %%al, 2(%%edx)
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jmp 1f
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0:
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cmpl $0, %%ecx
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je 1f
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movb %%al, (%%edx)
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1:
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"
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: : "m" (fillval), "c" (count), "d" (dest)
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: "%eax", "%ebx", "%edi", "%esi", "cc", "memory");
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}
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void Com_Prefetch (const void *s, const unsigned int bytes, e_prefetch type)
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{
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// write buffer prefetching is performed only if
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// the processor benefits from it. Read and read/write
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// prefetching is always performed.
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switch (type)
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{
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case PRE_WRITE : break;
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case PRE_READ:
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case PRE_READ_WRITE:
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__asm__ __volatile__ ("
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//mov ebx,s
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//mov ecx,bytes
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cmpl $4096, %%ecx // clamp to 4kB
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jle 0f
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movl $4096, %%ecx
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0:
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addl $0x1f, %%ecx
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shrl $5, %%ecx // number of cache lines
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jz 2f
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jmp 1f
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.align 16
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1: testb %%al, (%%edx)
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addl $32, %%edx
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decl %%ecx
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jnz 1b
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2:
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"
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: : "d" (s), "c" (bytes)
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: "%eax", "%ebx", "%edi", "%esi", "memory", "cc");
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break;
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}
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}
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#endif
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