mirror of
https://github.com/dhewm/dhewm3.git
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348 lines
8 KiB
C++
348 lines
8 KiB
C++
/*
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===========================================================================
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Doom 3 GPL Source Code
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Copyright (C) 1999-2011 id Software LLC, a ZeniMax Media company.
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This file is part of the Doom 3 GPL Source Code ("Doom 3 Source Code").
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Doom 3 Source Code is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Doom 3 Source Code is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Doom 3 Source Code. If not, see <http://www.gnu.org/licenses/>.
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In addition, the Doom 3 Source Code is also subject to certain additional terms. You should have received a copy of these additional terms immediately following the terms and conditions of the GNU General Public License which accompanied the Doom 3 Source Code. If not, please request a copy in writing from id Software at the address below.
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If you have questions concerning this license or the applicable additional terms, you may contact in writing id Software LLC, c/o ZeniMax Media Inc., Suite 120, Rockville, Maryland 20850 USA.
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===========================================================================
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*/
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#include "sys/platform.h"
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#include "sys/win32/win_local.h"
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/*
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===============================================================================
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FPU
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===============================================================================
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*/
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typedef struct bitFlag_s {
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const char *name;
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int bit;
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} bitFlag_t;
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static byte fpuState[128], *statePtr = fpuState;
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static char fpuString[2048];
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static bitFlag_t controlWordFlags[] = {
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{ "Invalid operation", 0 },
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{ "Denormalized operand", 1 },
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{ "Divide-by-zero", 2 },
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{ "Numeric overflow", 3 },
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{ "Numeric underflow", 4 },
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{ "Inexact result (precision)", 5 },
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{ "Infinity control", 12 },
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{ "", 0 }
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};
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static const char *precisionControlField[] = {
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"Single Precision (24-bits)",
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"Reserved",
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"Double Precision (53-bits)",
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"Double Extended Precision (64-bits)"
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};
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static const char *roundingControlField[] = {
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"Round to nearest",
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"Round down",
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"Round up",
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"Round toward zero"
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};
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static bitFlag_t statusWordFlags[] = {
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{ "Invalid operation", 0 },
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{ "Denormalized operand", 1 },
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{ "Divide-by-zero", 2 },
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{ "Numeric overflow", 3 },
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{ "Numeric underflow", 4 },
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{ "Inexact result (precision)", 5 },
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{ "Stack fault", 6 },
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{ "Error summary status", 7 },
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{ "FPU busy", 15 },
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{ "", 0 }
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};
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/*
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===============
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Sys_FPU_PrintStateFlags
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===============
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*/
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int Sys_FPU_PrintStateFlags( char *ptr, int ctrl, int stat, int tags, int inof, int inse, int opof, int opse ) {
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#ifdef _MSC_VER
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int i, length = 0;
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length += sprintf( ptr+length, "CTRL = %08x\n"
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"STAT = %08x\n"
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"TAGS = %08x\n"
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"INOF = %08x\n"
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"INSE = %08x\n"
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"OPOF = %08x\n"
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"OPSE = %08x\n"
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"\n",
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ctrl, stat, tags, inof, inse, opof, opse );
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length += sprintf( ptr+length, "Control Word:\n" );
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for ( i = 0; controlWordFlags[i].name[0]; i++ ) {
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length += sprintf( ptr+length, " %-30s = %s\n", controlWordFlags[i].name, ( ctrl & ( 1 << controlWordFlags[i].bit ) ) ? "true" : "false" );
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}
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length += sprintf( ptr+length, " %-30s = %s\n", "Precision control", precisionControlField[(ctrl>>8)&3] );
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length += sprintf( ptr+length, " %-30s = %s\n", "Rounding control", roundingControlField[(ctrl>>10)&3] );
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length += sprintf( ptr+length, "Status Word:\n" );
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for ( i = 0; statusWordFlags[i].name[0]; i++ ) {
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ptr += sprintf( ptr+length, " %-30s = %s\n", statusWordFlags[i].name, ( stat & ( 1 << statusWordFlags[i].bit ) ) ? "true" : "false" );
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}
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length += sprintf( ptr+length, " %-30s = %d%d%d%d\n", "Condition code", (stat>>8)&1, (stat>>9)&1, (stat>>10)&1, (stat>>14)&1 );
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length += sprintf( ptr+length, " %-30s = %d\n", "Top of stack pointer", (stat>>11)&7 );
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return length;
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#else
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return 0;
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#endif
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}
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/*
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===============
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Sys_FPU_StackIsEmpty
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===============
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*/
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bool Sys_FPU_StackIsEmpty( void ) {
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#ifdef _MSC_VER
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__asm {
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mov eax, statePtr
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fnstenv [eax]
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mov eax, [eax+8]
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xor eax, 0xFFFFFFFF
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and eax, 0x0000FFFF
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jz empty
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}
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return false;
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empty:
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return true;
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#else
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return true;
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#endif
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}
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/*
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===============
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Sys_FPU_ClearStack
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===============
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*/
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void Sys_FPU_ClearStack( void ) {
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#ifdef _MSC_VER
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__asm {
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mov eax, statePtr
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fnstenv [eax]
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mov eax, [eax+8]
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xor eax, 0xFFFFFFFF
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mov edx, (3<<14)
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emptyStack:
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mov ecx, eax
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and ecx, edx
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jz done
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fstp st
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shr edx, 2
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jmp emptyStack
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done:
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}
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#endif
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}
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/*
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===============
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Sys_FPU_GetState
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gets the FPU state without changing the state
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===============
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*/
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const char *Sys_FPU_GetState( void ) {
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#ifdef _MSC_VER
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double fpuStack[8] = { 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0 };
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double *fpuStackPtr = fpuStack;
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int i, numValues;
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char *ptr;
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__asm {
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mov esi, statePtr
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mov edi, fpuStackPtr
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fnstenv [esi]
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mov esi, [esi+8]
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xor esi, 0xFFFFFFFF
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mov edx, (3<<14)
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xor eax, eax
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mov ecx, esi
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and ecx, edx
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jz done
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fst qword ptr [edi+0]
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inc eax
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(1)
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fst qword ptr [edi+8]
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inc eax
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fxch st(1)
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(2)
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fst qword ptr [edi+16]
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inc eax
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fxch st(2)
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(3)
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fst qword ptr [edi+24]
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inc eax
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fxch st(3)
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(4)
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fst qword ptr [edi+32]
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inc eax
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fxch st(4)
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(5)
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fst qword ptr [edi+40]
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inc eax
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fxch st(5)
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(6)
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fst qword ptr [edi+48]
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inc eax
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fxch st(6)
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shr edx, 2
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mov ecx, esi
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and ecx, edx
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jz done
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fxch st(7)
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fst qword ptr [edi+56]
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inc eax
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fxch st(7)
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done:
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mov numValues, eax
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}
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int ctrl = *(int *)&fpuState[0];
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int stat = *(int *)&fpuState[4];
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int tags = *(int *)&fpuState[8];
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int inof = *(int *)&fpuState[12];
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int inse = *(int *)&fpuState[16];
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int opof = *(int *)&fpuState[20];
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int opse = *(int *)&fpuState[24];
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ptr = fpuString;
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ptr += sprintf( ptr,"FPU State:\n"
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"num values on stack = %d\n", numValues );
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for ( i = 0; i < 8; i++ ) {
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ptr += sprintf( ptr, "ST%d = %1.10e\n", i, fpuStack[i] );
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}
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Sys_FPU_PrintStateFlags( ptr, ctrl, stat, tags, inof, inse, opof, opse );
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return fpuString;
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#else
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return "";
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#endif
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}
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/*
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===============
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Sys_FPU_EnableExceptions
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===============
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*/
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void Sys_FPU_EnableExceptions( int exceptions ) {
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#ifdef _MSC_VER
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__asm {
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mov eax, statePtr
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mov ecx, exceptions
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and cx, 63
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not cx
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fnstcw word ptr [eax]
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mov bx, word ptr [eax]
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or bx, 63
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and bx, cx
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mov word ptr [eax], bx
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fldcw word ptr [eax]
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}
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#endif
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}
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/*
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===============
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Sys_FPU_SetPrecision
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===============
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*/
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void Sys_FPU_SetPrecision( int precision ) {
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#ifdef _MSC_VER
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short precisionBitTable[4] = { 0, 1, 3, 0 };
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short precisionBits = precisionBitTable[precision & 3] << 8;
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short precisionMask = ~( ( 1 << 9 ) | ( 1 << 8 ) );
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__asm {
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mov eax, statePtr
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mov cx, precisionBits
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fnstcw word ptr [eax]
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mov bx, word ptr [eax]
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and bx, precisionMask
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or bx, cx
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mov word ptr [eax], bx
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fldcw word ptr [eax]
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}
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#endif
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}
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/*
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================
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Sys_FPU_SetRounding
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================
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*/
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void Sys_FPU_SetRounding( int rounding ) {
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#ifdef _MSC_VER
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short roundingBitTable[4] = { 0, 1, 2, 3 };
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short roundingBits = roundingBitTable[rounding & 3] << 10;
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short roundingMask = ~( ( 1 << 11 ) | ( 1 << 10 ) );
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__asm {
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mov eax, statePtr
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mov cx, roundingBits
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fnstcw word ptr [eax]
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mov bx, word ptr [eax]
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and bx, roundingMask
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or bx, cx
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mov word ptr [eax], bx
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fldcw word ptr [eax]
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}
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#endif
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}
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