mirror of
https://github.com/ZDoom/Raze.git
synced 2024-12-25 03:30:53 +00:00
bbbb61f450
LZMA update plus several ZScript improvements.
340 lines
8.4 KiB
C
340 lines
8.4 KiB
C
/* 7zCrc.c -- CRC32 calculation and init
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2023-04-02 : Igor Pavlov : Public domain */
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#include "Precomp.h"
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#include "7zCrc.h"
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#include "CpuArch.h"
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#define kCrcPoly 0xEDB88320
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#ifdef MY_CPU_LE
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#define CRC_NUM_TABLES 8
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#else
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#define CRC_NUM_TABLES 9
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UInt32 Z7_FASTCALL CrcUpdateT1_BeT4(UInt32 v, const void *data, size_t size, const UInt32 *table);
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UInt32 Z7_FASTCALL CrcUpdateT1_BeT8(UInt32 v, const void *data, size_t size, const UInt32 *table);
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#endif
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#ifndef MY_CPU_BE
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UInt32 Z7_FASTCALL CrcUpdateT4(UInt32 v, const void *data, size_t size, const UInt32 *table);
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UInt32 Z7_FASTCALL CrcUpdateT8(UInt32 v, const void *data, size_t size, const UInt32 *table);
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#endif
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/*
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extern
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CRC_FUNC g_CrcUpdateT4;
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CRC_FUNC g_CrcUpdateT4;
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*/
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extern
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CRC_FUNC g_CrcUpdateT8;
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CRC_FUNC g_CrcUpdateT8;
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extern
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CRC_FUNC g_CrcUpdateT0_32;
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CRC_FUNC g_CrcUpdateT0_32;
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extern
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CRC_FUNC g_CrcUpdateT0_64;
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CRC_FUNC g_CrcUpdateT0_64;
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extern
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CRC_FUNC g_CrcUpdate;
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CRC_FUNC g_CrcUpdate;
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UInt32 g_CrcTable[256 * CRC_NUM_TABLES];
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UInt32 Z7_FASTCALL CrcUpdate(UInt32 v, const void *data, size_t size)
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{
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return g_CrcUpdate(v, data, size, g_CrcTable);
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}
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UInt32 Z7_FASTCALL CrcCalc(const void *data, size_t size)
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{
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return g_CrcUpdate(CRC_INIT_VAL, data, size, g_CrcTable) ^ CRC_INIT_VAL;
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}
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#if CRC_NUM_TABLES < 4 \
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|| (CRC_NUM_TABLES == 4 && defined(MY_CPU_BE)) \
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|| (!defined(MY_CPU_LE) && !defined(MY_CPU_BE))
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#define CRC_UPDATE_BYTE_2(crc, b) (table[((crc) ^ (b)) & 0xFF] ^ ((crc) >> 8))
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UInt32 Z7_FASTCALL CrcUpdateT1(UInt32 v, const void *data, size_t size, const UInt32 *table);
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UInt32 Z7_FASTCALL CrcUpdateT1(UInt32 v, const void *data, size_t size, const UInt32 *table)
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{
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const Byte *p = (const Byte *)data;
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const Byte *pEnd = p + size;
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for (; p != pEnd; p++)
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v = CRC_UPDATE_BYTE_2(v, *p);
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return v;
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}
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#endif
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/* ---------- hardware CRC ---------- */
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#ifdef MY_CPU_LE
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#if defined(MY_CPU_ARM_OR_ARM64)
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// #pragma message("ARM*")
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#if defined(_MSC_VER)
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#if defined(MY_CPU_ARM64)
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#if (_MSC_VER >= 1910)
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#ifndef __clang__
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#define USE_ARM64_CRC
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#include <intrin.h>
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#endif
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#endif
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#endif
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#elif (defined(__clang__) && (__clang_major__ >= 3)) \
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|| (defined(__GNUC__) && (__GNUC__ > 4))
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#if !defined(__ARM_FEATURE_CRC32)
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#define __ARM_FEATURE_CRC32 1
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#if defined(__clang__)
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#if defined(MY_CPU_ARM64)
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#define ATTRIB_CRC __attribute__((__target__("crc")))
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#else
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#define ATTRIB_CRC __attribute__((__target__("armv8-a,crc")))
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#endif
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#else
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#if defined(MY_CPU_ARM64)
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#define ATTRIB_CRC __attribute__((__target__("+crc")))
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#else
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#define ATTRIB_CRC __attribute__((__target__("arch=armv8-a+crc")))
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#endif
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#endif
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#endif
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#if defined(__ARM_FEATURE_CRC32)
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#define USE_ARM64_CRC
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#include <arm_acle.h>
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#endif
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#endif
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#else
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// no hardware CRC
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// #define USE_CRC_EMU
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#ifdef USE_CRC_EMU
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#pragma message("ARM64 CRC emulation")
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Z7_FORCE_INLINE
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UInt32 __crc32b(UInt32 v, UInt32 data)
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{
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const UInt32 *table = g_CrcTable;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data);
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return v;
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}
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Z7_FORCE_INLINE
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UInt32 __crc32w(UInt32 v, UInt32 data)
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{
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const UInt32 *table = g_CrcTable;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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return v;
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}
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Z7_FORCE_INLINE
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UInt32 __crc32d(UInt32 v, UInt64 data)
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{
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const UInt32 *table = g_CrcTable;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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v = CRC_UPDATE_BYTE_2(v, (Byte)data); data >>= 8;
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return v;
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}
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#endif // USE_CRC_EMU
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#endif // defined(MY_CPU_ARM64) && defined(MY_CPU_LE)
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#if defined(USE_ARM64_CRC) || defined(USE_CRC_EMU)
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#define T0_32_UNROLL_BYTES (4 * 4)
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#define T0_64_UNROLL_BYTES (4 * 8)
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#ifndef ATTRIB_CRC
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#define ATTRIB_CRC
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#endif
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// #pragma message("USE ARM HW CRC")
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ATTRIB_CRC
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UInt32 Z7_FASTCALL CrcUpdateT0_32(UInt32 v, const void *data, size_t size, const UInt32 *table);
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ATTRIB_CRC
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UInt32 Z7_FASTCALL CrcUpdateT0_32(UInt32 v, const void *data, size_t size, const UInt32 *table)
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{
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const Byte *p = (const Byte *)data;
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UNUSED_VAR(table);
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for (; size != 0 && ((unsigned)(ptrdiff_t)p & (T0_32_UNROLL_BYTES - 1)) != 0; size--)
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v = __crc32b(v, *p++);
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if (size >= T0_32_UNROLL_BYTES)
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{
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const Byte *lim = p + size;
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size &= (T0_32_UNROLL_BYTES - 1);
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lim -= size;
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do
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{
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v = __crc32w(v, *(const UInt32 *)(const void *)(p));
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v = __crc32w(v, *(const UInt32 *)(const void *)(p + 4)); p += 2 * 4;
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v = __crc32w(v, *(const UInt32 *)(const void *)(p));
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v = __crc32w(v, *(const UInt32 *)(const void *)(p + 4)); p += 2 * 4;
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}
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while (p != lim);
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}
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for (; size != 0; size--)
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v = __crc32b(v, *p++);
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return v;
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}
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ATTRIB_CRC
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UInt32 Z7_FASTCALL CrcUpdateT0_64(UInt32 v, const void *data, size_t size, const UInt32 *table);
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ATTRIB_CRC
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UInt32 Z7_FASTCALL CrcUpdateT0_64(UInt32 v, const void *data, size_t size, const UInt32 *table)
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{
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const Byte *p = (const Byte *)data;
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UNUSED_VAR(table);
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for (; size != 0 && ((unsigned)(ptrdiff_t)p & (T0_64_UNROLL_BYTES - 1)) != 0; size--)
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v = __crc32b(v, *p++);
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if (size >= T0_64_UNROLL_BYTES)
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{
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const Byte *lim = p + size;
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size &= (T0_64_UNROLL_BYTES - 1);
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lim -= size;
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do
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{
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v = __crc32d(v, *(const UInt64 *)(const void *)(p));
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v = __crc32d(v, *(const UInt64 *)(const void *)(p + 8)); p += 2 * 8;
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v = __crc32d(v, *(const UInt64 *)(const void *)(p));
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v = __crc32d(v, *(const UInt64 *)(const void *)(p + 8)); p += 2 * 8;
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}
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while (p != lim);
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}
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for (; size != 0; size--)
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v = __crc32b(v, *p++);
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return v;
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}
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#undef T0_32_UNROLL_BYTES
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#undef T0_64_UNROLL_BYTES
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#endif // defined(USE_ARM64_CRC) || defined(USE_CRC_EMU)
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#endif // MY_CPU_LE
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void Z7_FASTCALL CrcGenerateTable(void)
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{
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UInt32 i;
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for (i = 0; i < 256; i++)
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{
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UInt32 r = i;
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unsigned j;
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for (j = 0; j < 8; j++)
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r = (r >> 1) ^ (kCrcPoly & ((UInt32)0 - (r & 1)));
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g_CrcTable[i] = r;
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}
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for (i = 256; i < 256 * CRC_NUM_TABLES; i++)
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{
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const UInt32 r = g_CrcTable[(size_t)i - 256];
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g_CrcTable[i] = g_CrcTable[r & 0xFF] ^ (r >> 8);
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}
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#if CRC_NUM_TABLES < 4
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g_CrcUpdate = CrcUpdateT1;
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#elif defined(MY_CPU_LE)
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// g_CrcUpdateT4 = CrcUpdateT4;
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#if CRC_NUM_TABLES < 8
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g_CrcUpdate = CrcUpdateT4;
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#else // CRC_NUM_TABLES >= 8
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g_CrcUpdateT8 = CrcUpdateT8;
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/*
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#ifdef MY_CPU_X86_OR_AMD64
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if (!CPU_Is_InOrder())
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#endif
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*/
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g_CrcUpdate = CrcUpdateT8;
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#endif
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#else
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{
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#ifndef MY_CPU_BE
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UInt32 k = 0x01020304;
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const Byte *p = (const Byte *)&k;
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if (p[0] == 4 && p[1] == 3)
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{
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#if CRC_NUM_TABLES < 8
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// g_CrcUpdateT4 = CrcUpdateT4;
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g_CrcUpdate = CrcUpdateT4;
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#else // CRC_NUM_TABLES >= 8
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g_CrcUpdateT8 = CrcUpdateT8;
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g_CrcUpdate = CrcUpdateT8;
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#endif
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}
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else if (p[0] != 1 || p[1] != 2)
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g_CrcUpdate = CrcUpdateT1;
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else
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#endif // MY_CPU_BE
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{
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for (i = 256 * CRC_NUM_TABLES - 1; i >= 256; i--)
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{
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const UInt32 x = g_CrcTable[(size_t)i - 256];
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g_CrcTable[i] = Z7_BSWAP32(x);
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}
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#if CRC_NUM_TABLES <= 4
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g_CrcUpdate = CrcUpdateT1;
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#elif CRC_NUM_TABLES <= 8
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// g_CrcUpdateT4 = CrcUpdateT1_BeT4;
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g_CrcUpdate = CrcUpdateT1_BeT4;
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#else // CRC_NUM_TABLES > 8
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g_CrcUpdateT8 = CrcUpdateT1_BeT8;
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g_CrcUpdate = CrcUpdateT1_BeT8;
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#endif
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}
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}
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#endif // CRC_NUM_TABLES < 4
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#ifdef MY_CPU_LE
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#ifdef USE_ARM64_CRC
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if (CPU_IsSupported_CRC32())
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{
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g_CrcUpdateT0_32 = CrcUpdateT0_32;
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g_CrcUpdateT0_64 = CrcUpdateT0_64;
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g_CrcUpdate =
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#if defined(MY_CPU_ARM)
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CrcUpdateT0_32;
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#else
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CrcUpdateT0_64;
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#endif
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}
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#endif
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#ifdef USE_CRC_EMU
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g_CrcUpdateT0_32 = CrcUpdateT0_32;
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g_CrcUpdateT0_64 = CrcUpdateT0_64;
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g_CrcUpdate = CrcUpdateT0_64;
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#endif
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#endif
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}
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#undef kCrcPoly
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#undef CRC64_NUM_TABLES
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#undef CRC_UPDATE_BYTE_2
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