mirror of https://github.com/ZDoom/raze-gles.git
124 lines
2.7 KiB
Plaintext
124 lines
2.7 KiB
Plaintext
// Timing test for four 0..MAXSPRITES-1 access loops,
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// fwd->back->fwd->back.
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// Results with a LTO=1 RELEASE=1 C-CON build on x86: 42 ms for N=10.
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// (Compare with Lunatic results in test.elua)
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define N 10
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gamevar n 0 0
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gamevar i 0 0
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gamevar t 0 0
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gamevar t2 0 0
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define MAXSPRITES 16384
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define MAXSPRM1 16383 // MAXSPRITES-1
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onevent EVENT_ENTERLEVEL
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getticks t
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setvar n 0
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whilevarn n N
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{
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setvar i 0
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whilevarvarn i MAXSPRITES
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{
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setactor[i].blend 1
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addvar i 1
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}
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setvar i MAXSPRM1
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whilevarvarn i -1
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{
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setactor[i].shade 1
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subvar i 1
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}
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setvar i 0
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whilevarvarn i MAXSPRITES
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{
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setactor[i].xoffset 0
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addvar i 1
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}
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setvar i MAXSPRM1
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whilevarvarn i -1
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{
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setactor[i].yoffset 0
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subvar i 1
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}
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addvar n 1
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}
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getticks t2
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subvarvar t2 t
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// qsprintf test
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redefinequote 116 0..MAXSPITES-1
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redefinequote 117 in total
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redefinequote 114 %d x four %s iterations took %d ms %s
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qsprintf 115 /*<-*/ 114 /*args:*/ n 116 t2 117
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echo 115
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endevent
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////////// Periodically alpha-faded liztroop //////////
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gamevar alpha 0 0
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gamevar tmp 0 0
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onevent EVENT_GAME // XXX: better: on spawn + loadactor
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ifactor LIZTROOP
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{
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getactor[THISACTOR].mdflags tmp
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orvar tmp 16
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setactor[THISACTOR].mdflags tmp
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}
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endevent
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onevent EVENT_ANIMATESPRITES
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setvarvar tmp totalclock
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shiftvarl tmp 2
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sin alpha tmp // alpha is now in [-2^14 .. 2^14]
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shiftvarr alpha 7 // [-2^7 .. 2^7]
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addvar alpha 128 // [0 .. 256]
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ifvare alpha 0
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{
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// clear translucent bits, 0xfdfe == 0xffff-(1+512)
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gettspr[THISACTOR].tsprcstat tmp
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andvar tmp 0xfdfe
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settspr[THISACTOR].tsprcstat tmp
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}
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else
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{
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gettspr[THISACTOR].tsprcstat tmp
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orvar tmp 2
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settspr[THISACTOR].tsprcstat tmp
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// Assume blending tables [1 .. 128] are installed, like generated by
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// shadexfog.lua:create_128_trans(1).
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ifvarg alpha 128
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{
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setvarvar tmp 257
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subvarvar tmp alpha
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setvarvar alpha tmp
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// Set "reverse translucent" cstat bit
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gettspr[THISACTOR].tsprcstat tmp
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orvar tmp 512
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settspr[THISACTOR].tsprcstat tmp
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}
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else
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{
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// Clear cstat bit 512
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gettspr[THISACTOR].tsprcstat tmp
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andvar tmp 0xfdff
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settspr[THISACTOR].tsprcstat tmp
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}
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settspr[THISACTOR].tsprblend alpha
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}
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endevent
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