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386 lines
9 KiB
C
386 lines
9 KiB
C
/* Sha256Opt.c -- SHA-256 optimized code for SHA-256 hardware instructions
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2023-04-02 : Igor Pavlov : Public domain */
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#include "Precomp.h"
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#include "Compiler.h"
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#include "CpuArch.h"
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#if defined(_MSC_VER)
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#if (_MSC_VER < 1900) && (_MSC_VER >= 1200)
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// #define USE_MY_MM
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#endif
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#endif
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#ifdef MY_CPU_X86_OR_AMD64
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#if defined(__INTEL_COMPILER) && (__INTEL_COMPILER >= 1600) // fix that check
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#define USE_HW_SHA
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#elif defined(Z7_LLVM_CLANG_VERSION) && (Z7_LLVM_CLANG_VERSION >= 30800) \
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|| defined(Z7_APPLE_CLANG_VERSION) && (Z7_APPLE_CLANG_VERSION >= 50100) \
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|| defined(Z7_GCC_VERSION) && (Z7_GCC_VERSION >= 40900)
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#define USE_HW_SHA
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#if !defined(_INTEL_COMPILER)
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// icc defines __GNUC__, but icc doesn't support __attribute__(__target__)
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#if !defined(__SHA__) || !defined(__SSSE3__)
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#define ATTRIB_SHA __attribute__((__target__("sha,ssse3")))
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#endif
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#endif
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#elif defined(_MSC_VER)
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#ifdef USE_MY_MM
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#define USE_VER_MIN 1300
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#else
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#define USE_VER_MIN 1900
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#endif
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#if (_MSC_VER >= USE_VER_MIN)
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#define USE_HW_SHA
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#endif
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#endif
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// #endif // MY_CPU_X86_OR_AMD64
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#ifdef USE_HW_SHA
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// #pragma message("Sha256 HW")
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// sse/sse2/ssse3:
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#include <tmmintrin.h>
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// sha*:
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#include <immintrin.h>
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#if defined (__clang__) && defined(_MSC_VER)
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// #if !defined(__SSSE3__)
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// #endif
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#if !defined(__SHA__)
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#include <shaintrin.h>
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#endif
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#else
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#ifdef USE_MY_MM
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#include "My_mm.h"
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#endif
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#endif
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/*
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SHA256 uses:
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SSE2:
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_mm_loadu_si128
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_mm_storeu_si128
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_mm_set_epi32
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_mm_add_epi32
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_mm_shuffle_epi32 / pshufd
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SSSE3:
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_mm_shuffle_epi8 / pshufb
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_mm_alignr_epi8
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SHA:
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_mm_sha256*
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*/
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// K array must be aligned for 16-bytes at least.
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// The compiler can look align attribute and selects
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// movdqu - for code without align attribute
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// movdqa - for code with align attribute
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extern
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MY_ALIGN(64)
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const UInt32 SHA256_K_ARRAY[64];
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#define K SHA256_K_ARRAY
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#define ADD_EPI32(dest, src) dest = _mm_add_epi32(dest, src);
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#define SHA256_MSG1(dest, src) dest = _mm_sha256msg1_epu32(dest, src);
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#define SHA25G_MSG2(dest, src) dest = _mm_sha256msg2_epu32(dest, src);
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#define LOAD_SHUFFLE(m, k) \
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m = _mm_loadu_si128((const __m128i *)(const void *)(data + (k) * 16)); \
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m = _mm_shuffle_epi8(m, mask); \
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#define SM1(g0, g1, g2, g3) \
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SHA256_MSG1(g3, g0); \
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#define SM2(g0, g1, g2, g3) \
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tmp = _mm_alignr_epi8(g1, g0, 4); \
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ADD_EPI32(g2, tmp) \
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SHA25G_MSG2(g2, g1); \
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// #define LS0(k, g0, g1, g2, g3) LOAD_SHUFFLE(g0, k)
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// #define LS1(k, g0, g1, g2, g3) LOAD_SHUFFLE(g1, k+1)
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#define NNN(g0, g1, g2, g3)
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#define RND2(t0, t1) \
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t0 = _mm_sha256rnds2_epu32(t0, t1, msg);
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#define RND2_0(m, k) \
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msg = _mm_add_epi32(m, *(const __m128i *) (const void *) &K[(k) * 4]); \
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RND2(state0, state1); \
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msg = _mm_shuffle_epi32(msg, 0x0E); \
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#define RND2_1 \
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RND2(state1, state0); \
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// We use scheme with 3 rounds ahead for SHA256_MSG1 / 2 rounds ahead for SHA256_MSG2
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#define R4(k, g0, g1, g2, g3, OP0, OP1) \
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RND2_0(g0, k) \
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OP0(g0, g1, g2, g3) \
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RND2_1 \
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OP1(g0, g1, g2, g3) \
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#define R16(k, OP0, OP1, OP2, OP3, OP4, OP5, OP6, OP7) \
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R4 ( (k)*4+0, m0,m1,m2,m3, OP0, OP1 ) \
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R4 ( (k)*4+1, m1,m2,m3,m0, OP2, OP3 ) \
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R4 ( (k)*4+2, m2,m3,m0,m1, OP4, OP5 ) \
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R4 ( (k)*4+3, m3,m0,m1,m2, OP6, OP7 ) \
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#define PREPARE_STATE \
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tmp = _mm_shuffle_epi32(state0, 0x1B); /* abcd */ \
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state0 = _mm_shuffle_epi32(state1, 0x1B); /* efgh */ \
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state1 = state0; \
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state0 = _mm_unpacklo_epi64(state0, tmp); /* cdgh */ \
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state1 = _mm_unpackhi_epi64(state1, tmp); /* abef */ \
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void Z7_FASTCALL Sha256_UpdateBlocks_HW(UInt32 state[8], const Byte *data, size_t numBlocks);
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#ifdef ATTRIB_SHA
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ATTRIB_SHA
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#endif
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void Z7_FASTCALL Sha256_UpdateBlocks_HW(UInt32 state[8], const Byte *data, size_t numBlocks)
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{
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const __m128i mask = _mm_set_epi32(0x0c0d0e0f, 0x08090a0b, 0x04050607, 0x00010203);
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__m128i tmp;
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__m128i state0, state1;
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if (numBlocks == 0)
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return;
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state0 = _mm_loadu_si128((const __m128i *) (const void *) &state[0]);
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state1 = _mm_loadu_si128((const __m128i *) (const void *) &state[4]);
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PREPARE_STATE
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do
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{
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__m128i state0_save, state1_save;
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__m128i m0, m1, m2, m3;
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__m128i msg;
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// #define msg tmp
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state0_save = state0;
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state1_save = state1;
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LOAD_SHUFFLE (m0, 0)
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LOAD_SHUFFLE (m1, 1)
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LOAD_SHUFFLE (m2, 2)
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LOAD_SHUFFLE (m3, 3)
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R16 ( 0, NNN, NNN, SM1, NNN, SM1, SM2, SM1, SM2 )
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R16 ( 1, SM1, SM2, SM1, SM2, SM1, SM2, SM1, SM2 )
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R16 ( 2, SM1, SM2, SM1, SM2, SM1, SM2, SM1, SM2 )
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R16 ( 3, SM1, SM2, NNN, SM2, NNN, NNN, NNN, NNN )
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ADD_EPI32(state0, state0_save)
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ADD_EPI32(state1, state1_save)
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data += 64;
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}
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while (--numBlocks);
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PREPARE_STATE
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_mm_storeu_si128((__m128i *) (void *) &state[0], state0);
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_mm_storeu_si128((__m128i *) (void *) &state[4], state1);
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}
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#endif // USE_HW_SHA
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#elif defined(MY_CPU_ARM_OR_ARM64)
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#if defined(__clang__)
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#if (__clang_major__ >= 8) // fix that check
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#define USE_HW_SHA
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#endif
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#elif defined(__GNUC__)
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#if (__GNUC__ >= 6) // fix that check
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#define USE_HW_SHA
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#endif
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#elif defined(_MSC_VER)
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#if _MSC_VER >= 1910
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#define USE_HW_SHA
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#endif
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#endif
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#ifdef USE_HW_SHA
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// #pragma message("=== Sha256 HW === ")
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#if defined(__clang__) || defined(__GNUC__)
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#ifdef MY_CPU_ARM64
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#define ATTRIB_SHA __attribute__((__target__("+crypto")))
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#else
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#define ATTRIB_SHA __attribute__((__target__("fpu=crypto-neon-fp-armv8")))
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#endif
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#else
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// _MSC_VER
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// for arm32
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#define _ARM_USE_NEW_NEON_INTRINSICS
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#endif
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#if defined(_MSC_VER) && defined(MY_CPU_ARM64)
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#include <arm64_neon.h>
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#else
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#include <arm_neon.h>
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#endif
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typedef uint32x4_t v128;
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// typedef __n128 v128; // MSVC
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#ifdef MY_CPU_BE
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#define MY_rev32_for_LE(x)
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#else
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#define MY_rev32_for_LE(x) x = vreinterpretq_u32_u8(vrev32q_u8(vreinterpretq_u8_u32(x)))
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#endif
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#define LOAD_128(_p) (*(const v128 *)(const void *)(_p))
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#define STORE_128(_p, _v) *(v128 *)(void *)(_p) = (_v)
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#define LOAD_SHUFFLE(m, k) \
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m = LOAD_128((data + (k) * 16)); \
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MY_rev32_for_LE(m); \
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// K array must be aligned for 16-bytes at least.
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extern
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MY_ALIGN(64)
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const UInt32 SHA256_K_ARRAY[64];
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#define K SHA256_K_ARRAY
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#define SHA256_SU0(dest, src) dest = vsha256su0q_u32(dest, src);
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#define SHA25G_SU1(dest, src2, src3) dest = vsha256su1q_u32(dest, src2, src3);
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#define SM1(g0, g1, g2, g3) SHA256_SU0(g3, g0)
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#define SM2(g0, g1, g2, g3) SHA25G_SU1(g2, g0, g1)
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#define NNN(g0, g1, g2, g3)
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#define R4(k, g0, g1, g2, g3, OP0, OP1) \
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msg = vaddq_u32(g0, *(const v128 *) (const void *) &K[(k) * 4]); \
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tmp = state0; \
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state0 = vsha256hq_u32( state0, state1, msg ); \
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state1 = vsha256h2q_u32( state1, tmp, msg ); \
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OP0(g0, g1, g2, g3); \
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OP1(g0, g1, g2, g3); \
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#define R16(k, OP0, OP1, OP2, OP3, OP4, OP5, OP6, OP7) \
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R4 ( (k)*4+0, m0, m1, m2, m3, OP0, OP1 ) \
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R4 ( (k)*4+1, m1, m2, m3, m0, OP2, OP3 ) \
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R4 ( (k)*4+2, m2, m3, m0, m1, OP4, OP5 ) \
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R4 ( (k)*4+3, m3, m0, m1, m2, OP6, OP7 ) \
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void Z7_FASTCALL Sha256_UpdateBlocks_HW(UInt32 state[8], const Byte *data, size_t numBlocks);
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#ifdef ATTRIB_SHA
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ATTRIB_SHA
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#endif
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void Z7_FASTCALL Sha256_UpdateBlocks_HW(UInt32 state[8], const Byte *data, size_t numBlocks)
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{
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v128 state0, state1;
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if (numBlocks == 0)
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return;
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state0 = LOAD_128(&state[0]);
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state1 = LOAD_128(&state[4]);
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do
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{
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v128 state0_save, state1_save;
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v128 m0, m1, m2, m3;
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v128 msg, tmp;
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state0_save = state0;
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state1_save = state1;
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LOAD_SHUFFLE (m0, 0)
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LOAD_SHUFFLE (m1, 1)
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LOAD_SHUFFLE (m2, 2)
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LOAD_SHUFFLE (m3, 3)
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R16 ( 0, NNN, NNN, SM1, NNN, SM1, SM2, SM1, SM2 );
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R16 ( 1, SM1, SM2, SM1, SM2, SM1, SM2, SM1, SM2 );
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R16 ( 2, SM1, SM2, SM1, SM2, SM1, SM2, SM1, SM2 );
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R16 ( 3, SM1, SM2, NNN, SM2, NNN, NNN, NNN, NNN );
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state0 = vaddq_u32(state0, state0_save);
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state1 = vaddq_u32(state1, state1_save);
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data += 64;
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}
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while (--numBlocks);
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STORE_128(&state[0], state0);
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STORE_128(&state[4], state1);
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}
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#endif // USE_HW_SHA
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#endif // MY_CPU_ARM_OR_ARM64
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#ifndef USE_HW_SHA
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// #error Stop_Compiling_UNSUPPORTED_SHA
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// #include <stdlib.h>
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// #include "Sha256.h"
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void Z7_FASTCALL Sha256_UpdateBlocks(UInt32 state[8], const Byte *data, size_t numBlocks);
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#pragma message("Sha256 HW-SW stub was used")
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void Z7_FASTCALL Sha256_UpdateBlocks_HW(UInt32 state[8], const Byte *data, size_t numBlocks);
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void Z7_FASTCALL Sha256_UpdateBlocks_HW(UInt32 state[8], const Byte *data, size_t numBlocks)
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{
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Sha256_UpdateBlocks(state, data, numBlocks);
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/*
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UNUSED_VAR(state);
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UNUSED_VAR(data);
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UNUSED_VAR(numBlocks);
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exit(1);
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return;
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*/
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}
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#endif
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#undef K
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#undef RND2
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#undef RND2_0
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#undef RND2_1
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#undef MY_rev32_for_LE
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#undef NNN
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#undef LOAD_128
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#undef STORE_128
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#undef LOAD_SHUFFLE
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#undef SM1
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#undef SM2
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#undef NNN
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#undef R4
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#undef R16
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#undef PREPARE_STATE
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#undef USE_HW_SHA
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#undef ATTRIB_SHA
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#undef USE_VER_MIN
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