mirror of
https://github.com/ZDoom/gzdoom-gles.git
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Revert "- started adding ARM support. incomplete. won't compile. don't try."
This reverts commit be8abba344.
This commit is contained in:
Rachael Alexanderson
parent
2c27b74e34
commit
effe8a1e80
5 changed files with 0 additions and 1448 deletions
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@ -502,11 +502,6 @@ if( ZD_CMAKE_COMPILER_IS_GNUCXX_COMPATIBLE )
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set( CMAKE_EXE_LINKER_FLAGS "-stdlib=libc++ ${CMAKE_EXE_LINKER_FLAGS}" )
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endif ()
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# ARM processors (Raspberry Pi) - enable ARM NEON support.
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if(${CMAKE_SYSTEM_PROCESSOR} MATCHES "arm")
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set( CMAKE_CXX_FLAGS "-mfpu=neon ${CMAKE_CXX_FLAGS}" )
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endif ()
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# Remove extra warnings when using the official DirectX headers.
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# Also, TDM-GCC 4.4.0 no longer accepts glibc-style printf formats as valid,
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# which is a royal pain. The previous version I had been using was fine with them.
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1198
src/ila/SSE2NEON.h
1198
src/ila/SSE2NEON.h
File diff suppressed because it is too large
Load diff
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@ -1,56 +0,0 @@
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/*******************************************************************************
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Copyright (c) 2017 Rachael Alexanderson
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software
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without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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================================================================================
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Simple In-Line Assembly support for ARM
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The purpose of this file is to provide SSE2 translations to ARM NEON. Note
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that this requires a special GCC flag (which should automatically be set by
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CMAKE).
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As stated in the other included file - this will never be as fast as remaking
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the SSE2 instructions from the ground up. But since I have no interest in
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doing so, myself - have at it if you want proper ARM support!
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For Raspberry Pi, note that this requires RPI2 or higher.
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*******************************************************************************/
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#if defined(__ARM_NEON__)
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#include "ila/sse_to_neon.hpp"
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// credit to Magnus Norddahl
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inline __m128i _mm_mullo_epi16(const __m128i& a, const __m128i& b){
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return vqrdmulhq_s16(reinterpret_cast<int16x8_t>(a),reinterpret_cast<int16x8_t>(b));
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}
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#else
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// Just standard old Intel!
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#include <emmintrin.h>
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#endif
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@ -1,187 +0,0 @@
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//
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// sse_to_neon.hpp
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// neon_test
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//
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// Created by Tim Oberhauser on 11/16/13.
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// Copyright (c) 2013 Tim Oberhauser. All rights reserved.
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//
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#ifndef neon_test_sse_to_neon_hpp
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#define neon_test_sse_to_neon_hpp
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#include <arm_neon.h>
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#if defined(__MM_MALLOC_H)
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// copied from mm_malloc.h {
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#include <stdlib.h>
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/* We can't depend on <stdlib.h> since the prototype of posix_memalign
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may not be visible. */
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#ifndef __cplusplus
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extern int posix_memalign (void **, size_t, size_t);
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#else
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extern "C" int posix_memalign (void **, size_t, size_t) throw ();
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#endif
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static __inline void *
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_mm_malloc (size_t size, size_t alignment)
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{
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void *ptr;
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if (alignment == 1)
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return malloc (size);
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if (alignment == 2 || (sizeof (void *) == 8 && alignment == 4))
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alignment = sizeof (void *);
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if (posix_memalign (&ptr, alignment, size) == 0)
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return ptr;
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else
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return NULL;
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}
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static __inline void
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_mm_free (void * ptr)
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{
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free (ptr);
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}
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// } copied from mm_malloc.h
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#endif
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typedef int16x8_t __m128i;
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typedef float32x4_t __m128;
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// ADDITION
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inline __m128i _mm_add_epi16(const __m128i& a, const __m128i& b){
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return vaddq_s16(reinterpret_cast<int16x8_t>(a),reinterpret_cast<int16x8_t>(b));
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}
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inline __m128 _mm_add_ps(const __m128& a, const __m128& b){
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return vaddq_f32(a,b);
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}
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// SUBTRACTION
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inline __m128i _mm_sub_epi16(const __m128i& a, const __m128i& b){
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return vsubq_s16(reinterpret_cast<int16x8_t>(a),reinterpret_cast<int16x8_t>(b));
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}
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inline __m128 _mm_sub_ps(const __m128& a, const __m128& b){
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return vsubq_f32(a,b);
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}
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// MULTIPLICATION
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#if 0
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inline __m128i _mm_mullo_epi16(const __m128i& a, const __m128i& b){
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return vqrdmulhq_s16(reinterpret_cast<int16x8_t>(a),reinterpret_cast<int16x8_t>(b));
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}
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#endif
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inline __m128 _mm_mul_ps(const __m128& a, const __m128& b){
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return vmulq_f32(a,b);
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}
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// SET VALUE
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inline __m128i _mm_set1_epi16(const int16_t w){
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return vmovq_n_s16(w);
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}
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inline __m128i _mm_setzero_si128(){
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return vmovq_n_s16(0);
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}
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inline __m128 _mm_set1_ps(const float32_t& w){
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return vmovq_n_f32(w);
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}
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// STORE
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inline void _mm_storeu_si128(__m128i* p, __m128i& a){
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vst1q_s16(reinterpret_cast<int16_t*>(p),reinterpret_cast<int16x8_t>(a));
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}
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inline void _mm_store_ps(float32_t* p, __m128&a){
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vst1q_f32(p,a);
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}
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// LOAD
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inline __m128i _mm_loadu_si128(__m128i* p){//For SSE address p does not need be 16-byte aligned
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return reinterpret_cast<__m128i>(vld1q_s16(reinterpret_cast<int16_t*>(p)));
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}
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inline __m128i _mm_load_si128(__m128i* p){//For SSE address p must be 16-byte aligned
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return reinterpret_cast<__m128i>(vld1q_s16(reinterpret_cast<int16_t*>(p)));
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}
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inline __m128 _mm_load_ps(const float32_t* p){
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return reinterpret_cast<__m128>(vld1q_f32(p));
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}
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// SHIFT OPERATIONS
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inline __m128i _mm_srai_epi16(const __m128i& a, const int count){
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int16x8_t b = vmovq_n_s16(-count);
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return reinterpret_cast<__m128i>(vshlq_s16(a,b));
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// return vrshrq_n_s16(a, count);// TODO Argument to '__builtin_neon_vrshrq_n_v' must be a constant integer
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}
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// MIN/MAX OPERATIONS
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inline __m128 _mm_max_ps(const __m128& a, const __m128& b){
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return reinterpret_cast<__m128>(vmaxq_f32(reinterpret_cast<float32x4_t>(a),reinterpret_cast<float32x4_t>(b)));
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}
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// SINGLE ELEMENT ACCESS
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inline int16_t _mm_extract_epi16(__m128i& a, int index){
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return (reinterpret_cast<int16_t*>(&a))[index];
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// return vgetq_lane_s16(a,index);// TODO Argument to '__builtin_neon_vgetq_lane_i16' must be a constant integer
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}
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// MISCELLANOUS
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inline __m128i _mm_sad_epu8 (__m128i a, __m128i b){
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uint64x2_t sad = reinterpret_cast<uint64x2_t>(vabdq_u8(reinterpret_cast<uint8x16_t>(a),reinterpret_cast<uint8x16_t>(b)));
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sad = reinterpret_cast<uint64x2_t>(vpaddlq_u8(reinterpret_cast<uint8x16_t>(sad)));
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sad = reinterpret_cast<uint64x2_t>(vpaddlq_u16(reinterpret_cast<uint16x8_t>(sad)));
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sad = vpaddlq_u32(reinterpret_cast<uint32x4_t>(sad));
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return reinterpret_cast<__m128i>(sad);
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}
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// LOGICAL OPERATIONS
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inline __m128 _mm_and_ps(__m128& a, __m128& b){
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return reinterpret_cast<__m128>(vandq_u32(reinterpret_cast<uint32x4_t>(a),reinterpret_cast<uint32x4_t>(b)));
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}
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// CONVERSIONS
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inline __m128i _mm_packus_epi16 (const __m128i a, const __m128i b){
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__m128i result = _mm_setzero_si128();
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int8x8_t* a_narrow = reinterpret_cast<int8x8_t*>(&result);
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int8x8_t* b_narrow = &a_narrow[1];
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*a_narrow = reinterpret_cast<int8x8_t>(vqmovun_s16(a));
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*b_narrow = reinterpret_cast<int8x8_t>(vqmovun_s16(b));
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return result;
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}
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// In my case this function was only needed to convert 8 bit to 16 bit integers by extending with zeros, the general case is not implemented!!!
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inline __m128i _mm_unpacklo_epi8(__m128i a, const __m128i dummy_zero){
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// dummy_zero is a dummy variable
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uint8x8_t* a_low = reinterpret_cast<uint8x8_t*>(&a);
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return reinterpret_cast<__m128i>(vmovl_u8(*a_low));
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}
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// In my case this function was only needed to convert 8 bit to 16 bit integers by extending with zeros, the general case is not implemented!!!
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inline __m128i _mm_unpackhi_epi8(__m128i a, const __m128i dummy_zero){
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// dummy_zero is a dummy variable
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uint8x8_t* a_low = reinterpret_cast<uint8x8_t*>(&a);
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return reinterpret_cast<__m128i>(vmovl_u8(a_low[1]));
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}
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#endif
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@ -36,8 +36,6 @@
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#ifndef NO_SSE
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#include <immintrin.h>
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#else
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#include "ila/ila.h"
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#endif
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struct FSpecialColormap;
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