mirror of
https://github.com/ZDoom/gzdoom-gles.git
synced 2024-11-25 21:51:09 +00:00
Merge pull request #534 from Doom2fan/asmjit
Fix floats and implement some more opcodes.
This commit is contained in:
Magnus Norddahl
GitHub
commit
cb0a296fa7
1 changed files with 222 additions and 23 deletions
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@ -58,6 +58,9 @@ static asmjit::JitRuntime jit;
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#define ASSERTKA(x) assert(sfunc != NULL && (unsigned)(x) < sfunc->NumKonstA)
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#define ASSERTKS(x) assert(sfunc != NULL && (unsigned)(x) < sfunc->NumKonstS)
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// [pbeta] TODO: VM aborts
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#define NULL_POINTER_CHECK(a,o,x)
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static bool CanJit(VMScriptFunction *sfunc)
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{
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int size = sfunc->CodeSize;
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@ -74,13 +77,45 @@ static bool CanJit(VMScriptFunction *sfunc)
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case OP_NOP:
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case OP_LI:
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case OP_LK:
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//case OP_LKF:
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case OP_LKF:
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//case OP_LKS:
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//case OP_LKP:
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case OP_LKP:
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case OP_LK_R:
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//case OP_LKF_R:
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case OP_LKF_R:
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//case OP_LKS_R:
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//case OP_LKP_R:
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case OP_LB:
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case OP_LB_R:
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case OP_LH:
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case OP_LH_R:
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case OP_LW:
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case OP_LW_R:
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case OP_LBU:
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case OP_LBU_R:
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case OP_LHU:
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case OP_LHU_R:
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case OP_LSP:
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case OP_LSP_R:
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case OP_LDP:
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case OP_LDP_R:
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case OP_LV2:
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case OP_LV2_R:
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case OP_LV3:
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case OP_LV3_R:
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case OP_SB:
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case OP_SB_R:
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case OP_SH:
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case OP_SH_R:
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case OP_SW:
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case OP_SW_R:
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case OP_SSP:
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case OP_SSP_R:
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case OP_SDP:
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case OP_SDP_R:
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case OP_SV2:
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case OP_SV2_R:
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case OP_SV3:
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case OP_SV3_R:
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case OP_MOVE:
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//case OP_MOVEF:
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//case OP_MOVES:
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@ -95,7 +130,6 @@ static bool CanJit(VMScriptFunction *sfunc)
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int regnum = C;
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switch (regtype & REGT_TYPE)
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{
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case REGT_FLOAT:
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case REGT_STRING:
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case REGT_POINTER:
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return false;
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@ -209,7 +243,7 @@ JitFuncPtr JitCompile(VMScriptFunction *sfunc)
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cc.mov(initreg, x86::ptr(vmregs, sizeof(void*)));
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for (int i = 0; i < sfunc->NumRegF; i++)
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{
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regF[i] = cc.newXmm();
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regF[i] = cc.newXmmSd ();
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cc.movsd(regF[i], x86::qword_ptr(initreg, i * 4));
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}
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}
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@ -252,30 +286,38 @@ JitFuncPtr JitCompile(VMScriptFunction *sfunc)
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break;
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case OP_NOP: // no operation
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cc.nop();
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cc.nop ();
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break;
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// Load constants.
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// Load constants.
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case OP_LI: // load immediate signed 16-bit constant
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cc.mov(regD[a], BCs);
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cc.mov (regD[a], BCs);
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break;
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case OP_LK: // load integer constant
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cc.mov(regD[a], konstd[BC]);
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cc.mov (regD[a], konstd[BC]);
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break;
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case OP_LKF: // load float constant
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cc.movsd(regF[a], x86::ptr((ptrdiff_t)&konstf[BC]));
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{
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auto tmp = cc.newIntPtr ();
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cc.mov (tmp, (ptrdiff_t)&(konstf[BC]));
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cc.movsd (regF[a], x86::qword_ptr (tmp));
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}
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break;
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case OP_LKS: // load string constant
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//cc.mov(regS[a], konsts[BC]);
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break;
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case OP_LKP: // load pointer constant
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//cc.mov(regA[a], konsta[BC].v);
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cc.mov(regA[a], (int64_t) konsta[BC].v);
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break;
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case OP_LK_R: // load integer constant indexed
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cc.mov(regD[a], x86::ptr((ptrdiff_t)konstd, regD[B], 2, C * 4));
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break;
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case OP_LKF_R: // load float constant indexed
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cc.movsd(regF[a], x86::ptr((ptrdiff_t)konstf, regD[B], 3, C * 8));
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{
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auto tmp = cc.newIntPtr();
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cc.mov(tmp, (ptrdiff_t)&(konstf[BC]));
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cc.movsd(regF[a], x86::qword_ptr(tmp, regD[B], 3, C * 8));
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}
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break;
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case OP_LKS_R: // load string constant indexed
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//cc.mov(regS[a], konsts[regD[B] + C]);
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@ -291,57 +333,166 @@ JitFuncPtr JitCompile(VMScriptFunction *sfunc)
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// Load from memory. rA = *(rB + rkC)
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case OP_LB: // load byte
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.movsx (regD[a], x86::byte_ptr (PB, KC));
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break;
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case OP_LB_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.movsx (regD[a], x86::byte_ptr (PB, KC));
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break;
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case OP_LH: // load halfword
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.movsx (regD[a], x86::word_ptr (PB, KC));
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break;
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case OP_LH_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.movsx (regD[a], x86::word_ptr (PB, KC));
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break;
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case OP_LW: // load word
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.movsx (regD[a], x86::dword_ptr (PB, KC));
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break;
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case OP_LW_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.movsx (regD[a], x86::dword_ptr (PB, KC));
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break;
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case OP_LBU: // load byte unsigned
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.mov (regD[a], x86::byte_ptr (PB, KC));
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break;
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case OP_LBU_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.mov (regD[a], x86::byte_ptr (PB, KC));
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break;
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case OP_LHU: // load halfword unsigned
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.mov (regD[a], x86::word_ptr (PB, KC));
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break;
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case OP_LHU_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.mov (regD[a], x86::word_ptr (PB, KC));
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break;
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case OP_LSP: // load single-precision fp
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.movss (regF[a], x86::dword_ptr (PB, KC));
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break;
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case OP_LSP_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.movss (regF[a], x86::dword_ptr (PB, RC));
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break;
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case OP_LDP: // load double-precision fp
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NULL_POINTER_CHECK (PB, KC, X_READ_NIL);
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cc.movsd (regF[a], x86::qword_ptr (PB, KC));
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break;
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case OP_LDP_R:
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NULL_POINTER_CHECK (PB, RC, X_READ_NIL);
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cc.movsd (regF[a], x86::qword_ptr (PB, RC));
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break;
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case OP_LS: // load string
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case OP_LS_R:
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case OP_LO: // load object
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case OP_LO_R:
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case OP_LP: // load pointer
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case OP_LP_R:
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break;
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case OP_LV2: // load vector2
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case OP_LV2_R:
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NULL_POINTER_CHECK(PB, KC, X_READ_NIL);
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{
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auto tmp = cc.newIntPtr ();
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cc.mov(tmp, PB);
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cc.add(tmp, KC);
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cc.movsd(regF[a], x86::qword_ptr(tmp));
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cc.movsd(regF[a+1], x86::qword_ptr(tmp, 8));
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}
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break;
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case OP_LV2_R: // Not used?
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NULL_POINTER_CHECK(PB, RC, X_READ_NIL);
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{
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auto tmp = cc.newIntPtr ();
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cc.mov(tmp, PB);
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cc.add(tmp, RC);
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cc.movsd(regF[a], x86::qword_ptr(tmp));
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cc.movsd(regF[a+1], x86::qword_ptr(tmp, 8));
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}
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break;
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case OP_LV3: // load vector3
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NULL_POINTER_CHECK(PB, KC, X_READ_NIL);
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{
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auto tmp = cc.newIntPtr ();
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cc.mov(tmp, PB);
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cc.add(tmp, KC);
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cc.movsd(regF[a], x86::qword_ptr(tmp));
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cc.movsd(regF[a+1], x86::qword_ptr(tmp, 8));
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cc.movsd(regF[a+2], x86::qword_ptr(tmp, 16));
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}
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break;
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case OP_LV3_R:
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NULL_POINTER_CHECK(PB, RC, X_READ_NIL);
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{
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auto tmp = cc.newIntPtr ();
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cc.mov(tmp, PB);
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cc.add(tmp, RC);
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cc.movsd(regF[a], x86::qword_ptr(tmp));
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cc.movsd(regF[a+1], x86::qword_ptr(tmp, 8));
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cc.movsd(regF[a+2], x86::qword_ptr(tmp, 16));
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}
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break;
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case OP_LCS: // load string from char ptr.
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case OP_LCS_R:
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break;
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case OP_LBIT: // rA = !!(*rB & C) -- *rB is a byte
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/*NULL_POINTER_CHECK (PB, 0, X_READ_NIL);
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{
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auto tmp = cc.newInt8 ();
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cc.mov (regD[a], PB);
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cc.and_ (regD[a], C);
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cc.test (regD[a], regD[a]);
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cc.sete (tmp);
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cc.movzx (regD[a], tmp);
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}*/
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break;
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// Store instructions. *(rA + rkC) = rB
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case OP_SB: // store byte
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//if (PA == NULL) { ThrowAbortException(X_WRITE_NIL, nullptr); return 0; }
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NULL_POINTER_CHECK(PA, KC, X_WRITE_NIL);
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cc.mov(x86::byte_ptr(PA, KC), regD[B]);
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break;
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case OP_SB_R:
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//if (PA == NULL) { ThrowAbortException(X_WRITE_NIL, nullptr); return 0; }
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NULL_POINTER_CHECK(PA, RC, X_WRITE_NIL);
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cc.mov(x86::byte_ptr(PA, RC), regD[B]);
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break;
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case OP_SH: // store halfword
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NULL_POINTER_CHECK(PA, KC, X_WRITE_NIL);
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cc.mov(x86::word_ptr(PA, KC), regD[B]);
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break;
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case OP_SH_R:
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NULL_POINTER_CHECK(PA, RC, X_WRITE_NIL);
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cc.mov(x86::word_ptr(PA, RC), regD[B]);
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break;
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case OP_SW: // store word
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//if (PA == NULL) { ThrowAbortException(X_WRITE_NIL, nullptr); return 0; }
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NULL_POINTER_CHECK(PA, KC, X_WRITE_NIL);
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cc.mov(x86::dword_ptr(PA, KC), regD[B]);
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break;
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case OP_SW_R:
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//if (PA == NULL) { ThrowAbortException(X_WRITE_NIL, nullptr); return 0; }
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NULL_POINTER_CHECK(PA, RC, X_WRITE_NIL);
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cc.mov(x86::dword_ptr(PA, RC), regD[B]);
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break;
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case OP_SSP: // store single-precision fp
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NULL_POINTER_CHECK (PB, KC, X_WRITE_NIL);
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cc.movss(x86::dword_ptr(PA, KC), regF[B]);
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break;
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case OP_SSP_R:
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NULL_POINTER_CHECK (PB, RC, X_WRITE_NIL);
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cc.movss(x86::dword_ptr(PA, RC), regF[B]);
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break;
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case OP_SDP: // store double-precision fp
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NULL_POINTER_CHECK (PB, KC, X_WRITE_NIL);
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cc.movsd(x86::qword_ptr(PA, KC), regF[B]);
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break;
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case OP_SDP_R:
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NULL_POINTER_CHECK (PB, RC, X_WRITE_NIL);
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cc.movsd(x86::qword_ptr(PA, RC), regF[B]);
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break;
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case OP_SS: // store string
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case OP_SS_R:
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case OP_SO: // store object pointer with write barrier (only needed for non thinkers and non types)
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@ -349,9 +500,47 @@ JitFuncPtr JitCompile(VMScriptFunction *sfunc)
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case OP_SP: // store pointer
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case OP_SP_R:
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case OP_SV2: // store vector2
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NULL_POINTER_CHECK (PB, KC, X_WRITE_NIL);
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{
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auto tmp = cc.newIntPtr();
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cc.mov(tmp, PB);
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cc.add(tmp, KC);
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cc.movsd(x86::qword_ptr(tmp), regF[B]);
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cc.movsd(x86::qword_ptr(tmp, 8), regF[B+1]);
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}
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break;
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case OP_SV2_R:
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NULL_POINTER_CHECK (PB, RC, X_WRITE_NIL);
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{
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auto tmp = cc.newIntPtr();
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cc.mov(tmp, PB);
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cc.add(tmp, RC);
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cc.movsd(x86::qword_ptr(tmp), regF[B]);
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cc.movsd(x86::qword_ptr(tmp, 8), regF[B+1]);
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}
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break;
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case OP_SV3: // store vector3
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NULL_POINTER_CHECK (PB, KC, X_WRITE_NIL);
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{
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auto tmp = cc.newIntPtr();
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cc.mov(tmp, PB);
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cc.add(tmp, KC);
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cc.movsd(x86::qword_ptr(tmp), regF[B]);
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cc.movsd(x86::qword_ptr(tmp, 8), regF[B+1]);
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cc.movsd(x86::qword_ptr(tmp, 16), regF[B+2]);
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}
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break;
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case OP_SV3_R:
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NULL_POINTER_CHECK (PB, RC, X_WRITE_NIL);
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{
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auto tmp = cc.newIntPtr();
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cc.mov(tmp, PB);
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cc.add(tmp, RC);
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cc.movsd(x86::qword_ptr(tmp), regF[B]);
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cc.movsd(x86::qword_ptr(tmp, 8), regF[B+1]);
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cc.movsd(x86::qword_ptr(tmp, 16), regF[B+2]);
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}
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break;
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case OP_SBIT: // *rA |= C if rB is true, *rA &= ~C otherwise
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break;
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@ -432,20 +621,30 @@ JitFuncPtr JitCompile(VMScriptFunction *sfunc)
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case REGT_FLOAT:
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if (regtype & REGT_KONST)
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{
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auto tmp = cc.newInt64();
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if (regtype & REGT_MULTIREG3)
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{
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cc.mov(x86::qword_ptr(location), (int64_t)(ptrdiff_t)&konstf[regnum]);
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cc.mov(x86::qword_ptr(location, 8), (int64_t)(ptrdiff_t)&konstf[regnum + 1]);
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cc.mov(x86::qword_ptr(location, 16), (int64_t)(ptrdiff_t)&konstf[regnum + 2]);
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cc.mov(tmp, (((int64_t *)konstf)[regnum]));
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cc.mov(x86::qword_ptr(location), tmp);
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cc.mov(tmp, (((int64_t *)konstf)[regnum + 1]));
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cc.mov(x86::qword_ptr(location, 8), tmp);
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cc.mov(tmp, (((int64_t *)konstf)[regnum + 2]));
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cc.mov(x86::qword_ptr(location, 16), tmp);
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}
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else if (regtype & REGT_MULTIREG2)
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{
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cc.mov(x86::qword_ptr(location), (int64_t)(ptrdiff_t)&konstf[regnum]);
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cc.mov(x86::qword_ptr(location, 8), (int64_t)(ptrdiff_t)&konstf[regnum + 1]);
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cc.mov(tmp, (((int64_t *)konstf)[regnum]));
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cc.mov(x86::qword_ptr(location), tmp);
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cc.mov(tmp, (((int64_t *)konstf)[regnum + 1]));
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cc.mov(x86::qword_ptr(location, 8), tmp);
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}
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else
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{
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cc.mov(x86::qword_ptr(location), (int64_t)(ptrdiff_t)&konstf[regnum]);
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cc.mov(tmp, (((int64_t *)konstf)[regnum]));
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cc.mov(x86::qword_ptr(location), tmp);
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}
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}
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else
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