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https://github.com/DrBeef/ioq3quest.git
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664f8e578d
- replace some whitespace with tabs in snapvector.c - Give gcc a bit more freedom in choice of registers
87 lines
2.2 KiB
C
87 lines
2.2 KiB
C
/*
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===========================================================================
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Copyright (C) 2011 Thilo Schulz <thilo@tjps.eu>
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This file is part of Quake III Arena source code.
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Quake III Arena source code is free software; you can redistribute it
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and/or modify it under the terms of the GNU General Public License as
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published by the Free Software Foundation; either version 2 of the License,
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or (at your option) any later version.
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Quake III Arena source code is distributed in the hope that it will be
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useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Quake III Arena source code; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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===========================================================================
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*/
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#include "qasm-inline.h"
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#include "../qcommon/q_shared.h"
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/*
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* GNU inline asm version of qsnapvector
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* See MASM snapvector.asm for commentary
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*/
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static unsigned char ssemask[16] __attribute__((aligned(16))) =
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{
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"\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\x00\x00\x00\x00"
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};
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static const unsigned int ssecw __attribute__((aligned(16))) = 0x00001F80;
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static const unsigned short fpucw = 0x037F;
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void qsnapvectorsse(vec3_t vec)
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{
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uint32_t oldcw __attribute__((aligned(16)));
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__asm__ volatile
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(
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"stmxcsr %3\n"
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"ldmxcsr %1\n"
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"movaps (%0), %%xmm1\n"
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"movups (%2), %%xmm0\n"
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"cvtps2dq %%xmm0, %%xmm0\n"
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"cvtdq2ps %%xmm0, %%xmm0\n"
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// vec MUST reside in register rdi as maskmovdqu uses
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// it as an implicit operand. The "D" constraint makes
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// sure of that.
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"maskmovdqu %%xmm1, %%xmm0\n"
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"ldmxcsr %3\n"
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:
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: "r" (ssemask), "m" (ssecw), "D" (vec), "m" (oldcw)
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: "memory", "%xmm0", "%xmm1"
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);
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}
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#define QROUNDX87(src) \
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"flds " src "\n" \
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"fistp " src "\n" \
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"fild " src "\n" \
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"fstp " src "\n"
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void qsnapvectorx87(vec3_t vec)
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{
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__asm__ volatile
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(
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"sub $2, " ESP "\n"
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"fnstcw (" ESP ")\n"
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"fldcw %0\n"
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QROUNDX87("(%1)")
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QROUNDX87("4(%1)")
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QROUNDX87("8(%1)")
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"fldcw (" ESP ")\n"
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"add $2, " ESP "\n"
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:
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: "m" (fpucw), "r" (vec)
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: "memory"
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);
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}
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