mirror of
https://git.code.sf.net/p/quake/quakeforge
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155 lines
2.7 KiB
ArmAsm
155 lines
2.7 KiB
ArmAsm
/*
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sw_fpua.S
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Intel 32-bit assembly language dependent routines.
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Copyright (C) 1996-1997 Id Software, Inc.
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This program is free software; you can redistribute it and/or
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modify it under the terms of the GNU General Public License
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as published by the Free Software Foundation; either version 2
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of the License, or (at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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See the GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to:
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Free Software Foundation, Inc.
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59 Temple Place - Suite 330
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Boston, MA 02111-1307, USA
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$Id$
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*/
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#ifdef HAVE_CONFIG_H
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# include <config.h>
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#endif
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#include "asm_i386.h"
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#ifdef USE_INTEL_ASM
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#ifdef WIN32
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# undef PIC //no such thing in win32
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#endif
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.data
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.align 4
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fpenv:
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.long 0, 0, 0, 0, 0, 0, 0, 0
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#ifdef PIC
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#define got_base(n) \
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call .Lpic##n ;\
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.Lpic##n: ;\
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popl %edx ;\
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addl $C(_GLOBAL_OFFSET_TABLE_)+[.-.Lpic##n],%edx
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#define got_var(v) v@GOTOFF(%edx)
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#define F_BEGIN(name) \
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.globl C(name) ;\
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.type C(name),@function ;\
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C(name):
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#define F_END(name) .size C(name),.-C(name)
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#else
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#define got_base(n)
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#define got_var(v) v
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#define F_BEGIN(name) \
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.globl C(name) ;\
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C(name):
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#define F_END(name)
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#endif
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.text
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F_BEGIN(MaskExceptions)
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got_base(1)
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fnstenv got_var(fpenv)
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orl $0x3F,got_var(fpenv)
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fldenv got_var(fpenv)
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ret
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F_END(MaskExceptions)
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#if 0
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F_BEGIN(unmaskexceptions)
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got_base(2)
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fnstenv got_var(fpenv)
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andl $0xFFFFFFE0,got_var(fpenv)
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fldenv got_var(fpenv)
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ret
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F_END(unmaskexceptions)
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#endif
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.data
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.align 4
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.globl ceil_cw, single_cw, full_cw, cw, pushed_cw
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ceil_cw: .long 0
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single_cw: .long 0
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full_cw: .long 0
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cw: .long 0
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pushed_cw: .long 0
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#ifdef PIC
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.type ceil_cw,@object
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.type single_cw,@object
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.type full_cw,@object
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.type cw,@object
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.type pushed_cw,@object
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.size ceil_cw,4
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.size single_cw,4
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.size full_cw,4
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.size cw,4
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.size pushed_cw,4
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#endif
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.text
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F_BEGIN(R_LowFPPrecision)
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got_base(3)
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fldcw got_var(single_cw)
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ret
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F_END(R_LowFPPrecision)
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F_BEGIN(R_HighFPPrecision)
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got_base(4)
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fldcw got_var(full_cw)
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ret
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F_END(R_HighFPPrecision)
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F_BEGIN(R_SetFPCW)
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got_base(7)
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fnstcw got_var(cw)
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movl got_var(cw),%eax
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andb $0xF0,%ah
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orb $0x03,%ah // round mode, 64-bit precision
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movl %eax,got_var(full_cw)
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andb $0xF0,%ah
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orb $0x0C,%ah // chop mode, single precision
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movl %eax,got_var(single_cw)
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andb $0xF0,%ah
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orb $0x08,%ah // ceil mode, single precision
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movl %eax,got_var(ceil_cw)
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ret
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F_END(R_SetFPCW)
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#endif /* USE_INTEL_ASM */
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