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https://github.com/Q3Rally-Team/rallyunlimited-engine.git
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101 lines
5.4 KiB
C
101 lines
5.4 KiB
C
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/***********************************************************************
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Copyright (c) 2017 Google Inc.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of Internet Society, IETF or IETF Trust, nor the
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names of specific contributors, may be used to endorse or promote
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products derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***********************************************************************/
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#ifndef SILK_NSQ_DEL_DEC_ARM_H
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#define SILK_NSQ_DEL_DEC_ARM_H
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#include "celt/arm/armcpu.h"
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#if defined(OPUS_ARM_MAY_HAVE_NEON_INTR)
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void silk_NSQ_del_dec_neon(
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const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
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SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
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const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
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const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
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const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
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const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
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const opus_int Tilt_Q14[MAX_NB_SUBFR],
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const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
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const opus_int32 Gains_Q16[MAX_NB_SUBFR],
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const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
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const opus_int LTP_scale_Q14);
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#if !defined(OPUS_HAVE_RTCD)
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#define OVERRIDE_silk_NSQ_del_dec (1)
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#define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
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LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
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LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
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LTP_scale_Q14, arch) \
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((void)(arch), \
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PRESUME_NEON(silk_NSQ_del_dec)( \
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psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14, \
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AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
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Lambda_Q10, LTP_scale_Q14))
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#endif
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#endif
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#if !defined(OVERRIDE_silk_NSQ_del_dec)
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/*Is run-time CPU detection enabled on this platform?*/
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#if defined(OPUS_HAVE_RTCD) && (defined(OPUS_ARM_MAY_HAVE_NEON_INTR) && \
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!defined(OPUS_ARM_PRESUME_NEON_INTR))
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extern void (*const SILK_NSQ_DEL_DEC_IMPL[OPUS_ARCHMASK + 1])(
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const silk_encoder_state *psEncC, silk_nsq_state *NSQ,
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SideInfoIndices *psIndices, const opus_int16 x16[], opus_int8 pulses[],
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const opus_int16 PredCoef_Q12[2 * MAX_LPC_ORDER],
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const opus_int16 LTPCoef_Q14[LTP_ORDER * MAX_NB_SUBFR],
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const opus_int16 AR_Q13[MAX_NB_SUBFR * MAX_SHAPE_LPC_ORDER],
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const opus_int HarmShapeGain_Q14[MAX_NB_SUBFR],
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const opus_int Tilt_Q14[MAX_NB_SUBFR],
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const opus_int32 LF_shp_Q14[MAX_NB_SUBFR],
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const opus_int32 Gains_Q16[MAX_NB_SUBFR],
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const opus_int pitchL[MAX_NB_SUBFR], const opus_int Lambda_Q10,
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const opus_int LTP_scale_Q14);
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#define OVERRIDE_silk_NSQ_del_dec (1)
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#define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
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LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
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LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
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LTP_scale_Q14, arch) \
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((*SILK_NSQ_DEL_DEC_IMPL[(arch)&OPUS_ARCHMASK])( \
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psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, LTPCoef_Q14, \
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AR_Q13, HarmShapeGain_Q14, Tilt_Q14, LF_shp_Q14, Gains_Q16, pitchL, \
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Lambda_Q10, LTP_scale_Q14))
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#elif defined(OPUS_ARM_PRESUME_NEON_INTR)
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#define OVERRIDE_silk_NSQ_del_dec (1)
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#define silk_NSQ_del_dec(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
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LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
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LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
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LTP_scale_Q14, arch) \
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((void)(arch), \
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silk_NSQ_del_dec_neon(psEncC, NSQ, psIndices, x16, pulses, PredCoef_Q12, \
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LTPCoef_Q14, AR_Q13, HarmShapeGain_Q14, Tilt_Q14, \
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LF_shp_Q14, Gains_Q16, pitchL, Lambda_Q10, \
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LTP_scale_Q14))
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#endif
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#endif
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#endif /* end SILK_NSQ_DEL_DEC_ARM_H */
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