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5747d75042
Makefile changed to statically compile Speex into FTEQW where possible. git-svn-id: https://svn.code.sf.net/p/fteqw/code/trunk@4146 fc73d0e0-1445-4013-8a0c-d673dee63da5
112 lines
4 KiB
C
112 lines
4 KiB
C
/* Copyright (C) 2005 Analog Devices */
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/**
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@author Jean-Marc Valin
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@file cb_search_bfin.h
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@brief Fixed codebook functions (Blackfin version)
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*/
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/*
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of the Xiph.org Foundation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#define OVERRIDE_COMPUTE_WEIGHTED_CODEBOOK
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void compute_weighted_codebook(const signed char *shape_cb, const spx_word16_t *r, spx_word16_t *resp, spx_word16_t *resp2, spx_word32_t *E, int shape_cb_size, int subvect_size, char *stack)
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{
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int i;
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for (i=0;i<shape_cb_size;i++)
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{
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__asm__ __volatile__ (
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"P0 = %0;\n\t"
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"LC0 = P0;\n\t"
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"P1 = %1;\n\t"
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"P2 = %2;\n\t"
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"P3 = %3;\n\t"
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"P0 = 1;\n\t"
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"L0 = 0;\n\t"
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"L1 = 0;\n\t"
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"R2 = 0;\n\t"
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"A1 = 0;\n\t"
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"LOOP outter%= LC0;\n\t"
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"LOOP_BEGIN outter%=;\n\t"
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"A0 = 0;\n\t"
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"P4 = P1;\n\t"
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"I1 = P2;\n\t"
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"R0 = B[P4++] (X) || R1.L = W[I1--];\n\t"
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"LOOP inner%= LC1 = P0;\n\t"
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"LOOP_BEGIN inner%=;\n\t"
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"A0 += R0.L*R1.L (IS) || R0 = B[P4++] (X) || R1.L = W[I1--];\n\t"
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"LOOP_END inner%=;\n\t"
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"R0 = A0;\n\t"
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"R0 >>>= 13;\n\t"
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"A1 += R0.L*R0.L (IS);\n\t"
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"W[P3++] = R0;\n\t"
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"P0 += 1;\n\t"
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"P2 += 2;\n\t"
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"LOOP_END outter%=;\n\t"
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"P4 = %4;\n\t"
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"R1 = A1;\n\t"
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"[P4] = R1;\n\t"
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:
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: "m" (subvect_size), "m" (shape_cb), "m" (r), "m" (resp), "m" (E)
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: "A0", "P0", "P1", "P2", "P3", "P4", "R0", "R1", "R2", "I0", "I1", "L0",
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"L1", "A0", "A1", "memory"
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#if !(__GNUC__ == 3)
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, "LC0", "LC1" /* gcc 3.4 doesn't know about LC registers */
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#endif
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);
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shape_cb += subvect_size;
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resp += subvect_size;
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E++;
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}
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}
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#define OVERRIDE_TARGET_UPDATE
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static inline void target_update(spx_word16_t *t, spx_word16_t g, spx_word16_t *r, int len)
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{
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if (!len)
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return;
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__asm__ __volatile__
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(
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"I0 = %0;\n\t"
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"I1 = %1;\n\t"
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"L0 = 0;\n\t"
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"L1 = 0;\n\t"
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"R2 = 4096;\n\t"
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"LOOP tupdate%= LC0 = %3;\n\t"
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"LOOP_BEGIN tupdate%=;\n\t"
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"R0.L = W[I0] || R1.L = W[I1++];\n\t"
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"R1 = (A1 = R1.L*%2.L) (IS);\n\t"
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"R1 = R1 + R2;\n\t"
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"R1 >>>= 13;\n\t"
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"R0.L = R0.L - R1.L;\n\t"
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"W[I0++] = R0.L;\n\t"
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"LOOP_END tupdate%=;\n\t"
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:
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: "a" (t), "a" (r), "d" (g), "a" (len)
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: "R0", "R1", "R2", "A1", "I0", "I1", "L0", "L1"
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);
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}
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