mirror of https://github.com/ioquake/ioq3.git
Fix #if macros for idx64 and id386
This commit is contained in:
Thilo Schulz
parent
a5035841d2
commit
a447aa82af
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@ -24,7 +24,7 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#include "../qcommon/q_platform.h"
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#ifdef idx64
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#if idx64
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#define EAX "%%rax"
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#define EBX "%%rbx"
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#define ESP "%%rsp"
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@ -90,9 +90,9 @@ cvar_t *com_basegame;
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cvar_t *com_homepath;
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cvar_t *com_busyWait;
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#if defined(idx64)
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#if idx64
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void (*Q_VMftol)(void);
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#elif defined(id386)
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#elif id386
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long (QDECL *Q_ftol)(float f);
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void (QDECL *Q_VMftol)(void);
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void (QDECL *Q_SnapVector)(vec3_t vec);
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@ -2580,11 +2580,11 @@ Find out whether we have SSE support for Q_ftol function
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=================
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*/
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#if defined(id386) || defined(idx64)
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#if id386 || idx64
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static void Com_DetectSSE(void)
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{
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#ifndef idx64
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#if !idx64
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cpuFeatures_t feat;
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feat = Sys_GetProcessorFeatures();
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@ -2601,7 +2601,7 @@ static void Com_DetectSSE(void)
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Q_VMftol = qvmftolsse;
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Com_Printf("Have SSE support\n");
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#ifndef idx64
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#if !idx64
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}
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else
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{
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@ -24,6 +24,8 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#define __Q_PLATFORM_H
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// this is for determining if we have an asm version of a C function
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#define idx64 0
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#ifdef Q3_VM
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#define id386 0
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@ -76,7 +78,8 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#if defined(_WIN64) || defined(__WIN64__)
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#define idx64
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#undef idx64
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#define idx64 1
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#undef QDECL
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#define QDECL __cdecl
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@ -146,7 +149,8 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#define ARCH_STRING "i386"
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#define Q3_LITTLE_ENDIAN
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#elif defined __x86_64__
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#define idx64
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#undef idx64
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#define idx64 1
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#define ARCH_STRING "x86_64"
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#define Q3_LITTLE_ENDIAN
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#endif
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@ -173,7 +177,8 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#if defined __i386__
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#define ARCH_STRING "i386"
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#elif defined __x86_64__
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#define idx64
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#undef idx64
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#define idx64 1
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#define ARCH_STRING "x86_64"
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#elif defined __powerpc64__
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#define ARCH_STRING "ppc64"
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@ -236,7 +241,8 @@ Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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#ifdef __i386__
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#define ARCH_STRING "i386"
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#elif defined __amd64__
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#define idx64
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#undef idx64
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#define idx64 1
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#define ARCH_STRING "amd64"
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#elif defined __axp__
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#define ARCH_STRING "alpha"
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@ -421,7 +421,7 @@ extern vec3_t axisDefault[3];
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int Q_isnan(float x);
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#ifdef idx64
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#if idx64
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extern long qftolsse(float f);
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extern void qvmftolsse(void);
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extern void qsnapvectorsse(vec3_t vec);
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@ -430,7 +430,7 @@ int Q_isnan(float x);
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#define Q_SnapVector qsnapvectorsse
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extern void (*Q_VMftol)(void);
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#elif defined(id386)
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#elif id386
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extern long QDECL qftolx87(float f);
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extern long QDECL qftolsse(float f);
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extern void QDECL qvmftolx87(void);
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@ -149,7 +149,7 @@ static void EmitPtr(void *ptr)
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intptr_t v = (intptr_t) ptr;
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Emit4(v);
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#ifdef idx64
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#if idx64
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Emit1((v >> 32) & 0xFF);
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Emit1((v >> 40) & 0xFF);
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Emit1((v >> 48) & 0xFF);
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@ -192,7 +192,7 @@ static void EmitString( const char *string ) {
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}
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static void EmitRexString(byte rex, const char *string)
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{
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#ifdef idx64
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#if idx64
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if(rex)
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Emit1(rex);
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#endif
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@ -415,7 +415,7 @@ Uses asm to retrieve arguments from registers to work around different calling c
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=================
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*/
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#if defined(_MSC_VER) && defined(idx64)
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#if defined(_MSC_VER) && idx64
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extern void qsyscall64(void);
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extern uint8_t qvmcall64(int *programStack, int *opStack, intptr_t *instructionPointers, byte *dataBase);
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@ -457,7 +457,7 @@ static void DoSyscall(void)
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if(syscallNum < 0)
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{
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int *data;
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#ifdef idx64
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#if idx64
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int index;
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intptr_t args[11];
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#endif
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@ -469,7 +469,7 @@ static void DoSyscall(void)
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// modify VM stack pointer for recursive VM entry
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savedVM->programStack = programStack - 4;
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#ifdef idx64
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#if idx64
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args[0] = ~syscallNum;
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for(index = 1; index < ARRAY_LEN(args); index++)
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args[index] = data[index];
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@ -525,7 +525,7 @@ Call to DoSyscall()
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int EmitCallDoSyscall(vm_t *vm)
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{
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// use edx register to store DoSyscall address
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#if defined(_MSC_VER) && defined(idx64)
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#if defined(_MSC_VER) && idx64
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EmitRexString(0x48, "BA"); // mov edx, qsyscall64
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EmitPtr(qsyscall64);
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#else
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@ -538,7 +538,7 @@ int EmitCallDoSyscall(vm_t *vm)
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EmitString("51"); // push ebx
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EmitString("56"); // push esi
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EmitString("57"); // push edi
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "50"); // push r8
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EmitRexString(0x41, "51"); // push r9
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#endif
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@ -556,7 +556,7 @@ int EmitCallDoSyscall(vm_t *vm)
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EmitRexString(0x48, "89 EC"); // mov esp, ebp
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EmitString("5D"); // pop ebp
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "59"); // pop r9
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EmitRexString(0x41, "58"); // pop r8
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#endif
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@ -613,7 +613,7 @@ int EmitCallProcedure(vm_t *vm, int sysCallOfs)
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EmitString("73"); // jae badAddr
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jmpBadAddr = compiledOfs++;
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#ifdef idx64
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#if idx64
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EmitRexString(0x49, "FF 14 C0"); // call qword ptr [r8 + eax * 8]
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#else
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EmitString("FF 14 85"); // call dword ptr [vm->instructionPointers + eax * 4]
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@ -769,7 +769,7 @@ qboolean ConstOptimize(vm_t *vm, int callProcOfsSyscall)
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case OP_LOAD4:
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EmitPushStack(vm);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "8B 81"); // mov eax, dword ptr [r9 + 0x12345678]
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Emit4(Constant4() & vm->dataMask);
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#else
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@ -785,7 +785,7 @@ qboolean ConstOptimize(vm_t *vm, int callProcOfsSyscall)
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case OP_LOAD2:
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EmitPushStack(vm);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "0F B7 81"); // movzx eax, word ptr [r9 + 0x12345678]
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Emit4(Constant4() & vm->dataMask);
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#else
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@ -801,7 +801,7 @@ qboolean ConstOptimize(vm_t *vm, int callProcOfsSyscall)
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case OP_LOAD1:
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EmitPushStack(vm);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "0F B6 81"); // movzx eax, byte ptr [r9 + 0x12345678]
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Emit4(Constant4() & vm->dataMask);
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#else
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@ -817,7 +817,7 @@ qboolean ConstOptimize(vm_t *vm, int callProcOfsSyscall)
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case OP_STORE4:
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EmitMovEAXStack(vm, (vm->dataMask & ~3));
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "C7 04 01"); // mov dword ptr [r9 + eax], 0x12345678
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Emit4(Constant4());
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#else
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@ -832,7 +832,7 @@ qboolean ConstOptimize(vm_t *vm, int callProcOfsSyscall)
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case OP_STORE2:
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EmitMovEAXStack(vm, (vm->dataMask & ~1));
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#ifdef idx64
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#if idx64
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Emit1(0x66); // mov word ptr [r9 + eax], 0x1234
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EmitRexString(0x41, "C7 04 01");
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Emit2(Constant4());
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@ -849,7 +849,7 @@ qboolean ConstOptimize(vm_t *vm, int callProcOfsSyscall)
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case OP_STORE1:
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EmitMovEAXStack(vm, vm->dataMask);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "C6 04 01"); // mov byte [r9 + eax], 0x12
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Emit1(Constant4());
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#else
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@ -1208,7 +1208,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitString("81 C2"); // add edx, 0x12345678
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Emit4((Constant1() & 0xFF));
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MASK_REG("E2", vm->dataMask); // and edx, 0x12345678
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "89 04 11"); // mov dword ptr [r9 + edx], eax
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#else
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EmitString("89 82"); // mov dword ptr [edx + 0x12345678], eax
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@ -1246,7 +1246,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitMovEDXStack(vm, vm->dataMask);
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if(v == 1 && oc0 == oc1 && pop0 == OP_LOCAL && pop1 == OP_LOCAL)
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{
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "FF 04 11"); // inc dword ptr [r9 + edx]
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#else
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EmitString("FF 82"); // inc dword ptr [edx + 0x12345678]
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@ -1255,7 +1255,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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}
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else
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{
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "8B 04 11"); // mov eax, dword ptr [r9 + edx]
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#else
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EmitString("8B 82"); // mov eax, dword ptr [edx + 0x12345678]
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@ -1266,7 +1266,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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if (oc0 == oc1 && pop0 == OP_LOCAL && pop1 == OP_LOCAL)
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{
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "89 04 11"); // mov dword ptr [r9 + edx], eax
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#else
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EmitString("89 82"); // mov dword ptr [edx + 0x12345678], eax
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@ -1278,7 +1278,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitCommand(LAST_COMMAND_SUB_BL_1); // sub bl, 1
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EmitString("8B 14 9F"); // mov edx, dword ptr [edi + ebx * 4]
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MASK_REG("E2", vm->dataMask); // and edx, 0x12345678
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "89 04 11"); // mov dword ptr [r9 + edx], eax
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#else
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EmitString("89 82"); // mov dword ptr [edx + 0x12345678], eax
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@ -1308,7 +1308,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitMovEDXStack(vm, vm->dataMask);
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if(v == 1 && oc0 == oc1 && pop0 == OP_LOCAL && pop1 == OP_LOCAL)
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{
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "FF 0C 11"); // dec dword ptr [r9 + edx]
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#else
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EmitString("FF 8A"); // dec dword ptr [edx + 0x12345678]
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@ -1317,7 +1317,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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}
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else
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{
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "8B 04 11"); // mov eax, dword ptr [r9 + edx]
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#else
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EmitString("8B 82"); // mov eax, dword ptr [edx + 0x12345678]
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@ -1328,7 +1328,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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if(oc0 == oc1 && pop0 == OP_LOCAL && pop1 == OP_LOCAL)
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{
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "89 04 11"); // mov dword ptr [r9 + edx], eax
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#else
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EmitString("89 82"); // mov dword ptr [edx + 0x12345678], eax
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@ -1340,7 +1340,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitCommand(LAST_COMMAND_SUB_BL_1); // sub bl, 1
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EmitString("8B 14 9F"); // mov edx, dword ptr [edi + ebx * 4]
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MASK_REG("E2", vm->dataMask); // and edx, 0x12345678
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "89 04 11"); // mov dword ptr [r9 + edx], eax
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#else
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EmitString("89 82"); // mov dword ptr [edx + 0x12345678], eax
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@ -1360,7 +1360,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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compiledOfs -= 3;
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vm->instructionPointers[instruction - 1] = compiledOfs;
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MASK_REG("E0", vm->dataMask); // and eax, 0x12345678
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "8B 04 01"); // mov eax, dword ptr [r9 + eax]
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#else
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EmitString("8B 80"); // mov eax, dword ptr [eax + 0x1234567]
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@ -1371,7 +1371,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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}
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EmitMovEAXStack(vm, vm->dataMask);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "8B 04 01"); // mov eax, dword ptr [r9 + eax]
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#else
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EmitString("8B 80"); // mov eax, dword ptr [eax + 0x12345678]
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@ -1381,7 +1381,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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break;
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case OP_LOAD2:
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EmitMovEAXStack(vm, vm->dataMask);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "0F B7 04 01"); // movzx eax, word ptr [r9 + eax]
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#else
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EmitString("0F B7 80"); // movzx eax, word ptr [eax + 0x12345678]
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@ -1391,7 +1391,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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break;
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case OP_LOAD1:
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EmitMovEAXStack(vm, vm->dataMask);
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "0F B6 04 01"); // movzx eax, byte ptr [r9 + eax]
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#else
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EmitString("0F B6 80"); // movzx eax, byte ptr [eax + 0x12345678]
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@ -1403,7 +1403,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitMovEAXStack(vm, 0);
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EmitString("8B 54 9F FC"); // mov edx, dword ptr -4[edi + ebx * 4]
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MASK_REG("E2", vm->dataMask & ~3); // and edx, 0x12345678
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "89 04 11"); // mov dword ptr [r9 + edx], eax
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#else
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EmitString("89 82"); // mov dword ptr [edx + 0x12345678], eax
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@ -1415,7 +1415,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitMovEAXStack(vm, 0);
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EmitString("8B 54 9F FC"); // mov edx, dword ptr -4[edi + ebx * 4]
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MASK_REG("E2", vm->dataMask & ~1); // and edx, 0x12345678
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#ifdef idx64
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#if idx64
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Emit1(0x66); // mov word ptr [r9 + edx], eax
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EmitRexString(0x41, "89 04 11");
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#else
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@ -1428,7 +1428,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
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EmitMovEAXStack(vm, 0);
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EmitString("8B 54 9F FC"); // mov edx, dword ptr -4[edi + ebx * 4]
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MASK_REG("E2", vm->dataMask); // and edx, 0x12345678
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#ifdef idx64
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#if idx64
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EmitRexString(0x41, "88 04 11"); // mov byte ptr [r9 + edx], eax
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#else
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EmitString("88 82"); // mov byte ptr [edx + 0x12345678], eax
|
||||
|
|
@ -1651,7 +1651,7 @@ void VM_Compile(vm_t *vm, vmHeader_t *header)
|
|||
EmitString("8B 44 9F 04"); // mov eax, dword ptr 4[edi + ebx * 4]
|
||||
EmitString("81 F8"); // cmp eax, vm->instructionCount
|
||||
Emit4(vm->instructionCount);
|
||||
#ifdef idx64
|
||||
#if idx64
|
||||
EmitString("73 04"); // jae +4
|
||||
EmitRexString(0x49, "FF 24 C0"); // jmp qword ptr [r8 + eax * 8]
|
||||
#else
|
||||
|
|
@ -1779,7 +1779,7 @@ int VM_CallCompiled(vm_t *vm, int *args)
|
|||
opStackOfs = 0;
|
||||
|
||||
#ifdef _MSC_VER
|
||||
#ifdef idx64
|
||||
#if idx64
|
||||
opStackOfs = qvmcall64(&programStack, opStack, vm->instructionPointers, vm->dataBase);
|
||||
#else
|
||||
__asm
|
||||
|
|
@ -1799,7 +1799,7 @@ int VM_CallCompiled(vm_t *vm, int *args)
|
|||
popad
|
||||
}
|
||||
#endif
|
||||
#elif defined(idx64)
|
||||
#elif idx64
|
||||
__asm__ volatile(
|
||||
"movq %5, %%rax\r\n"
|
||||
"movq %3, %%r8\r\n"
|
||||
|
|
|
|||
|
|
@ -68,7 +68,7 @@ Set FPU control word to default value
|
|||
#define FPUCWMASK1 (_MCW_RC | _MCW_EM)
|
||||
#define FPUCW (_RC_CHOP | _MCW_EM | _PC_53)
|
||||
|
||||
#ifdef idx64
|
||||
#if idx64
|
||||
#define FPUCWMASK (FPUCWMASK1)
|
||||
#else
|
||||
#define FPUCWMASK (FPUCWMASK1 | _MCW_PC)
|
||||
|
|
|
|||
Loading…
Reference in New Issue