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cdf6fa3702
The defines in idlib/Str.h won't be set to redirect the low level c string functions to idStr when IDSTR_NO_REDIRECT is set. Fixes compilation for MSVC: error C2761: 'Cmp' : member function redeclaration not allowed Reported by spiral.
223 lines
5.4 KiB
C++
223 lines
5.4 KiB
C++
/*
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===========================================================================
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Doom 3 GPL Source Code
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Copyright (C) 1999-2011 id Software LLC, a ZeniMax Media company.
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This file is part of the Doom 3 GPL Source Code ("Doom 3 Source Code").
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Doom 3 Source Code is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Doom 3 Source Code is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Doom 3 Source Code. If not, see <http://www.gnu.org/licenses/>.
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In addition, the Doom 3 Source Code is also subject to certain additional terms. You should have received a copy of these additional terms immediately following the terms and conditions of the GNU General Public License which accompanied the Doom 3 Source Code. If not, please request a copy in writing from id Software at the address below.
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If you have questions concerning this license or the applicable additional terms, you may contact in writing id Software LLC, c/o ZeniMax Media Inc., Suite 120, Rockville, Maryland 20850 USA.
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===========================================================================
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*/
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#include <SDL_cpuinfo.h>
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// MSVC header intrin.h uses strcmp and errors out when not set
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#define IDSTR_NO_REDIRECT
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#include "sys/platform.h"
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#include "framework/Common.h"
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#include "sys/sys_public.h"
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#ifdef NO_SSE
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#undef NO_SSE
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#endif
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#if defined(__GNUC__)
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#if !defined(__i386__) && !defined(__x86_64__)
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#define NO_CPUID
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#endif
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#elif defined(_MSC_VER)
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#if !defined(_M_IX86) && !defined(_M_X64)
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#define NO_CPUID
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#endif
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#else
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#error unsupported compiler
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#endif
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#ifdef NO_CPUID
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void Sys_FPU_SetDAZ(bool enable) {
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common->Error("ERROR: Sys_FPU_SetDAZ not supported on this architecture\n");
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}
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void Sys_FPU_SetFTZ(bool enable) {
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common->Error("ERROR: Sys_FPU_SetFTZ not supported on this architecture\n");
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}
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#else
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#if defined(__GNUC__)
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static inline void CPUid(int index, int *a, int *b, int *c, int *d) {
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#if __x86_64__
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# define REG_b "rbx"
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# define REG_S "rsi"
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#elif __i386__
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# define REG_b "ebx"
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# define REG_S "esi"
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#endif
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*a = *b = *c = *d = 0;
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__asm__ volatile
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( "mov %%" REG_b ", %%" REG_S "\n\t"
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"cpuid\n\t"
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"xchg %%" REG_b ", %%" REG_S
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: "=a" (*a), "=S" (*b),
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"=c" (*c), "=d" (*d)
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: "0" (index));
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}
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#elif defined(_MSC_VER)
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#include <intrin.h>
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static inline void CPUid(int index, int *a, int *b, int *c, int *d) {
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int info[4] = { };
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// VS2005 and up
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__cpuid(info, index);
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*a = info[0];
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*b = info[1];
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*c = info[2];
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*d = info[3];
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}
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#else
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#error unsupported compiler
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#endif
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#define c_SSE3 (1 << 0)
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#define d_FXSAVE (1 << 24)
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static inline bool HasDAZ() {
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int a, b, c, d;
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CPUid(0, &a, &b, &c, &d);
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if (a < 1)
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return false;
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CPUid(1, &a, &b, &c, &d);
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return (d & d_FXSAVE) == d_FXSAVE;
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}
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static inline bool HasSSE3() {
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int a, b, c, d;
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CPUid(0, &a, &b, &c, &d);
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if (a < 1)
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return false;
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CPUid(1, &a, &b, &c, &d);
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return (c & c_SSE3) == c_SSE3;
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}
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#define MXCSR_DAZ (1 << 6)
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#define MXCSR_FTZ (1 << 15)
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#ifdef _MSC_VER
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#define STREFLOP_FSTCW(cw) do { short tmp; __asm { fstcw tmp }; (cw) = tmp; } while (0)
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#define STREFLOP_FLDCW(cw) do { short tmp = (cw); __asm { fclex }; __asm { fldcw tmp }; } while (0)
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#define STREFLOP_STMXCSR(cw) do { int tmp; __asm { stmxcsr tmp }; (cw) = tmp; } while (0)
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#define STREFLOP_LDMXCSR(cw) do { int tmp = (cw); __asm { ldmxcsr tmp }; } while (0)
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#else
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#define STREFLOP_FSTCW(cw) do { asm volatile ("fstcw %0" : "=m" (cw) : ); } while (0)
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#define STREFLOP_FLDCW(cw) do { asm volatile ("fclex \n fldcw %0" : : "m" (cw)); } while (0)
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#define STREFLOP_STMXCSR(cw) do { asm volatile ("stmxcsr %0" : "=m" (cw) : ); } while (0)
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#define STREFLOP_LDMXCSR(cw) do { asm volatile ("ldmxcsr %0" : : "m" (cw) ); } while (0)
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#endif
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static void EnableMXCSRFlag(int flag, bool enable, const char *name) {
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int sse_mode;
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STREFLOP_STMXCSR(sse_mode);
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if (enable && (sse_mode & flag) == flag) {
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common->Printf("%s mode is already enabled\n", name);
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return;
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}
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if (!enable && (sse_mode & flag) == 0) {
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common->Printf("%s mode is already disabled\n", name);
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return;
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}
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if (enable) {
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common->Printf("enabling %s mode\n", name);
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sse_mode |= flag;
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} else {
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common->Printf("disabling %s mode\n", name);
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sse_mode &= ~flag;
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}
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STREFLOP_LDMXCSR(sse_mode);
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}
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/*
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================
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Sys_FPU_SetDAZ
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================
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*/
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void Sys_FPU_SetDAZ(bool enable) {
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if (!HasDAZ()) {
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common->Printf("this CPU doesn't support Denormals-Are-Zero\n");
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return;
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}
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EnableMXCSRFlag(MXCSR_DAZ, enable, "Denormals-Are-Zero");
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}
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/*
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================
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Sys_FPU_SetFTZ
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================
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*/
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void Sys_FPU_SetFTZ(bool enable) {
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EnableMXCSRFlag(MXCSR_FTZ, enable, "Flush-To-Zero");
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}
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#endif
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/*
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================
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Sys_GetProcessorId
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================
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*/
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int Sys_GetProcessorId( void ) {
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int flags = CPUID_GENERIC;
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if (SDL_HasMMX())
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flags |= CPUID_MMX;
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if (SDL_Has3DNow())
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flags |= CPUID_3DNOW;
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if (SDL_HasSSE())
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flags |= CPUID_SSE;
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if (SDL_HasSSE2())
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flags |= CPUID_SSE2;
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#ifndef NO_SSE
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// there is no SDL_HasSSE3() in SDL 1.2
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if (HasSSE3())
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flags |= CPUID_SSE3;
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#endif
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if (SDL_HasAltiVec())
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flags |= CPUID_ALTIVEC;
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return flags;
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}
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