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8023bc5d56
Protect all SIMD implementations with the according defines and let the compiler decide if it supports the intructions. Linux will still use Simd_Generic because CPU feature runtime detection is missing.
367 lines
11 KiB
C++
367 lines
11 KiB
C++
/*
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===========================================================================
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Doom 3 GPL Source Code
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Copyright (C) 1999-2011 id Software LLC, a ZeniMax Media company.
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This file is part of the Doom 3 GPL Source Code ("Doom 3 Source Code").
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Doom 3 Source Code is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Doom 3 Source Code is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Doom 3 Source Code. If not, see <http://www.gnu.org/licenses/>.
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In addition, the Doom 3 Source Code is also subject to certain additional terms. You should have received a copy of these additional terms immediately following the terms and conditions of the GNU General Public License which accompanied the Doom 3 Source Code. If not, please request a copy in writing from id Software at the address below.
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If you have questions concerning this license or the applicable additional terms, you may contact in writing id Software LLC, c/o ZeniMax Media Inc., Suite 120, Rockville, Maryland 20850 USA.
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===========================================================================
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*/
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#include "../precompiled.h"
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#pragma hdrstop
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#include "Simd_Generic.h"
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#include "Simd_MMX.h"
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#include "Simd_SSE.h"
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#include "Simd_SSE2.h"
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#include "Simd_SSE3.h"
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//===============================================================
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//
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// SSE3 implementation of idSIMDProcessor
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//
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//===============================================================
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#if defined(__GNUC__) && defined(__SSE3__)
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/*
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============
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idSIMD_SSE3::GetName
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============
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*/
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const char * idSIMD_SSE3::GetName( void ) const {
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return "MMX & SSE & SSE2 & SSE3";
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}
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#elif defined(_WIN32)
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#include <xmmintrin.h>
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#define SHUFFLEPS( x, y, z, w ) (( (x) & 3 ) << 6 | ( (y) & 3 ) << 4 | ( (z) & 3 ) << 2 | ( (w) & 3 ))
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#define R_SHUFFLEPS( x, y, z, w ) (( (w) & 3 ) << 6 | ( (z) & 3 ) << 4 | ( (y) & 3 ) << 2 | ( (x) & 3 ))
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#define SHUFFLEPD( x, y ) (( (x) & 1 ) << 1 | ( (y) & 1 ))
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#define R_SHUFFLEPD( x, y ) (( (y) & 1 ) << 1 | ( (x) & 1 ))
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/*
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The first argument of an instruction macro is the destination
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and the second argument is the source operand. The destination
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operand can be _xmm0 to _xmm7 only. The source operand can be
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any one of the registers _xmm0 to _xmm7 or _eax, _ecx, _edx, _esp,
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_ebp, _ebx, _esi, or _edi that contains the effective address.
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For instance: haddps xmm0, xmm1
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becomes: haddps( _xmm0, _xmm1 )
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and: haddps xmm0, [esi]
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becomes: haddps( _xmm0, _esi )
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The ADDRESS_ADDC macro can be used when the effective source address
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is formed by adding a constant to a general purpose register.
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For instance: haddps xmm0, [esi+48]
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becomes: haddps( _xmm0, ADDRESS_ADDC( _esi, 48 ) )
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The ADDRESS_ADDR macro can be used when the effective source address
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is formed by adding two general purpose registers.
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For instance: haddps xmm0, [esi+eax]
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becomes: haddps( _xmm0, ADDRESS_ADDR( _esi, _eax ) )
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The ADDRESS_ADDRC macro can be used when the effective source address
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is formed by adding two general purpose registers and a constant.
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The constant must be in the range [-128, 127].
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For instance: haddps xmm0, [esi+eax+48]
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becomes: haddps( _xmm0, ADDRESS_ADDRC( _esi, _eax, 48 ) )
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The ADDRESS_SCALEADDR macro can be used when the effective source address is formed
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by adding a scaled general purpose register to another general purpose register.
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The scale must be either 1, 2, 4 or 8.
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For instance: haddps xmm0, [esi+eax*4]
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becomes: haddps( _xmm0, ADDRESS_SCALEADDR( _esi, _eax, 4 ) )
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The ADDRESS_SCALEADDRC macro can be used when the effective source address is formed
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by adding a scaled general purpose register to another general purpose register and
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also adding a constant. The scale must be either 1, 2, 4 or 8. The constant must
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be in the range [-128, 127].
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For instance: haddps xmm0, [esi+eax*4+64]
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becomes: haddps( _xmm0, ADDRESS_SCALEADDRC( _esi, _eax, 4, 64 ) )
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*/
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#define _eax 0x00
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#define _ecx 0x01
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#define _edx 0x02
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#define _ebx 0x03
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#define _esp 0x04
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#define _ebp 0x05
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#define _esi 0x06
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#define _edi 0x07
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#define _xmm0 0xC0
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#define _xmm1 0xC1
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#define _xmm2 0xC2
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#define _xmm3 0xC3
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#define _xmm4 0xC4
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#define _xmm5 0xC5
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#define _xmm6 0xC6
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#define _xmm7 0xC7
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#define RSCALE( s ) ( (s&2)<<5 ) | ( (s&4)<<5 ) | ( (s&8)<<3 ) | ( (s&8)<<4 )
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#define ADDRESS_ADDC( reg0, constant ) 0x40 | ( reg0 & 7 ) \
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_asm _emit constant
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#define ADDRESS_ADDR( reg0, reg1 ) 0x04 \
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_asm _emit ( ( reg1 & 7 ) << 3 ) | ( reg0 & 7 )
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#define ADDRESS_ADDRC( reg0, reg1, constant ) 0x44 \
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_asm _emit ( ( reg1 & 7 ) << 3 ) | ( reg0 & 7 ) \
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_asm _emit constant
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#define ADDRESS_SCALEADDR( reg0, reg1, scale ) 0x04 \
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_asm _emit ( ( reg1 & 7 ) << 3 ) | ( reg0 & 7 ) | RSCALE( scale )
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#define ADDRESS_SCALEADDRC( reg0, reg1, scale, constant ) 0x44 \
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_asm _emit ( ( reg1 & 7 ) << 3 ) | ( reg0 & 7 ) | RSCALE( scale ) \
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_asm _emit constant
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// Packed Single-FP Add/Subtract ( dst[0]=dst[0]+src[0], dst[1]=dst[1]-src[1], dst[2]=dst[2]+src[2], dst[3]=dst[3]-src[3] )
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#define addsubps( dst, src ) \
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_asm _emit 0xF2 \
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_asm _emit 0x0F \
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_asm _emit 0xD0 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Packed Double-FP Add/Subtract ( dst[0]=dst[0]+src[0], dst[1]=dst[1]-src[1] )
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#define addsubpd( dst, src ) \
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_asm _emit 0x66 \
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_asm _emit 0x0F \
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_asm _emit 0xD0 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Packed Single-FP Horizontal Add ( dst[0]=dst[0]+dst[1], dst[1]=dst[2]+dst[3], dst[2]=src[0]+src[1], dst[3]=src[2]+src[3] )
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#define haddps( dst, src ) \
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_asm _emit 0xF2 \
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_asm _emit 0x0F \
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_asm _emit 0x7C \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Packed Double-FP Horizontal Add ( dst[0]=dst[0]+dst[1], dst[1]=src[0]+src[1] )
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#define haddpd( dst, src ) \
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_asm _emit 0x66 \
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_asm _emit 0x0F \
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_asm _emit 0x7C \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Packed Single-FP Horizontal Subtract ( dst[0]=dst[0]-dst[1], dst[1]=dst[2]-dst[3], dst[2]=src[0]-src[1], dst[3]=src[2]-src[3] )
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#define hsubps( dst, src ) \
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_asm _emit 0xF2 \
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_asm _emit 0x0F \
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_asm _emit 0x7D \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Packed Double-FP Horizontal Subtract ( dst[0]=dst[0]-dst[1], dst[1]=src[0]-src[1] )
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#define hsubpd( dst, src ) \
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_asm _emit 0x66 \
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_asm _emit 0x0F \
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_asm _emit 0x7D \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Move Packed Single-FP Low and Duplicate ( dst[0]=src[0], dst[1]=src[0], dst[2]=src[2], dst[3]=src[2] )
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#define movsldup( dst, src ) \
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_asm _emit 0xF3 \
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_asm _emit 0x0F \
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_asm _emit 0x12 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Move One Double-FP Low and Duplicate ( dst[0]=src[0], dst[1]=src[0] )
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#define movdldup( dst, src ) \
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_asm _emit 0xF2 \
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_asm _emit 0x0F \
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_asm _emit 0x12 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Move Packed Single-FP High and Duplicate ( dst[0]=src[1], dst[1]=src[1], dst[2]=src[3], dst[3]=src[3] )
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#define movshdup( dst, src ) \
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_asm _emit 0xF3 \
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_asm _emit 0x0F \
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_asm _emit 0x16 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Move One Double-FP High and Duplicate ( dst[0]=src[1], dst[1]=src[1] )
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#define movdhdup( dst, src ) \
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_asm _emit 0xF2 \
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_asm _emit 0x0F \
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_asm _emit 0x16 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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// Load Unaligned Integer 128 bits
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#define lddqu( dst, src ) \
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_asm _emit 0xF2 \
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_asm _emit 0x0F \
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_asm _emit 0xF0 \
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_asm _emit ( ( dst & 7 ) << 3 ) | src
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#define DRAWVERT_SIZE 60
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#define DRAWVERT_XYZ_OFFSET (0*4)
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#define DRAWVERT_ST_OFFSET (3*4)
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#define DRAWVERT_NORMAL_OFFSET (5*4)
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#define DRAWVERT_TANGENT0_OFFSET (8*4)
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#define DRAWVERT_TANGENT1_OFFSET (11*4)
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#define DRAWVERT_COLOR_OFFSET (14*4)
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#define JOINTQUAT_SIZE (7*4)
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#define JOINTMAT_SIZE (4*3*4)
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#define JOINTWEIGHT_SIZE (4*4)
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/*
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============
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SSE3_Dot
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============
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*/
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float SSE3_Dot( const idVec4 &v1, const idVec4 &v2 ) {
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float d;
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__asm {
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mov esi, v1
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mov edi, v2
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movaps xmm0, [esi]
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mulps xmm0, [edi]
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haddps( _xmm0, _xmm0 )
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haddps( _xmm0, _xmm0 )
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movss d, xmm0
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}
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return d;
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}
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/*
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============
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idSIMD_SSE3::GetName
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============
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*/
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const char * idSIMD_SSE3::GetName( void ) const {
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return "MMX & SSE & SSE2 & SSE3";
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}
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/*
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============
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idSIMD_SSE3::TransformVerts
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============
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*/
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void VPCALL idSIMD_SSE3::TransformVerts( idDrawVert *verts, const int numVerts, const idJointMat *joints, const idVec4 *weights, const int *index, const int numWeights ) {
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#if 1
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assert( sizeof( idDrawVert ) == DRAWVERT_SIZE );
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assert( (int)&((idDrawVert *)0)->xyz == DRAWVERT_XYZ_OFFSET );
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assert( sizeof( idVec4 ) == JOINTWEIGHT_SIZE );
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assert( sizeof( idJointMat ) == JOINTMAT_SIZE );
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__asm
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{
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mov eax, numVerts
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test eax, eax
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jz done
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imul eax, DRAWVERT_SIZE
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mov ecx, verts
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mov edx, index
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mov esi, weights
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mov edi, joints
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add ecx, eax
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neg eax
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loopVert:
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mov ebx, [edx]
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movaps xmm2, [esi]
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add edx, 8
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movaps xmm0, xmm2
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add esi, JOINTWEIGHT_SIZE
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movaps xmm1, xmm2
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mulps xmm0, [edi+ebx+ 0] // xmm0 = m0, m1, m2, t0
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mulps xmm1, [edi+ebx+16] // xmm1 = m3, m4, m5, t1
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mulps xmm2, [edi+ebx+32] // xmm2 = m6, m7, m8, t2
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cmp dword ptr [edx-4], 0
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jne doneWeight
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loopWeight:
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mov ebx, [edx]
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movaps xmm5, [esi]
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add edx, 8
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movaps xmm3, xmm5
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add esi, JOINTWEIGHT_SIZE
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movaps xmm4, xmm5
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mulps xmm3, [edi+ebx+ 0] // xmm3 = m0, m1, m2, t0
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mulps xmm4, [edi+ebx+16] // xmm4 = m3, m4, m5, t1
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mulps xmm5, [edi+ebx+32] // xmm5 = m6, m7, m8, t2
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cmp dword ptr [edx-4], 0
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addps xmm0, xmm3
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addps xmm1, xmm4
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addps xmm2, xmm5
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je loopWeight
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doneWeight:
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add eax, DRAWVERT_SIZE
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haddps( _xmm0, _xmm1 )
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haddps( _xmm2, _xmm0 )
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movhps [ecx+eax-DRAWVERT_SIZE+0], xmm2
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haddps( _xmm2, _xmm2 )
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movss [ecx+eax-DRAWVERT_SIZE+8], xmm2
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jl loopVert
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done:
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}
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#else
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int i, j;
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const byte *jointsPtr = (byte *)joints;
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for( j = i = 0; i < numVerts; i++ ) {
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idVec3 v;
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v = ( *(idJointMat *) ( jointsPtr + index[j*2+0] ) ) * weights[j];
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while( index[j*2+1] == 0 ) {
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j++;
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v += ( *(idJointMat *) ( jointsPtr + index[j*2+0] ) ) * weights[j];
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}
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j++;
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verts[i].xyz = v;
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}
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#endif
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}
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#endif /* _WIN32 */
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