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a86defb0ca
Older MinGW versions do not know about __assume(). Change _WIN32 in comments too to match their opening #if. Reported by serpentine.
293 lines
10 KiB
C++
293 lines
10 KiB
C++
/*
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===========================================================================
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Doom 3 GPL Source Code
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Copyright (C) 1999-2011 id Software LLC, a ZeniMax Media company.
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This file is part of the Doom 3 GPL Source Code ("Doom 3 Source Code").
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Doom 3 Source Code is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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Doom 3 Source Code is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with Doom 3 Source Code. If not, see <http://www.gnu.org/licenses/>.
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In addition, the Doom 3 Source Code is also subject to certain additional terms. You should have received a copy of these additional terms immediately following the terms and conditions of the GNU General Public License which accompanied the Doom 3 Source Code. If not, please request a copy in writing from id Software at the address below.
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If you have questions concerning this license or the applicable additional terms, you may contact in writing id Software LLC, c/o ZeniMax Media Inc., Suite 120, Rockville, Maryland 20850 USA.
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===========================================================================
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*/
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#include "sys/platform.h"
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#include "idlib/math/Simd_3DNow.h"
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//===============================================================
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//
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// 3DNow! implementation of idSIMDProcessor
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//
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//===============================================================
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#ifdef _MSC_VER
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/*
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============
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idSIMD_3DNow::GetName
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============
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*/
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const char * idSIMD_3DNow::GetName( void ) const {
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return "MMX & 3DNow!";
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}
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// Very optimized memcpy() routine for all AMD Athlon and Duron family.
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// This code uses any of FOUR different basic copy methods, depending
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// on the transfer size.
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// NOTE: Since this code uses MOVNTQ (also known as "Non-Temporal MOV" or
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// "Streaming Store"), and also uses the software prefetchnta instructions,
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// be sure you're running on Athlon/Duron or other recent CPU before calling!
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#define TINY_BLOCK_COPY 64 // upper limit for movsd type copy
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// The smallest copy uses the X86 "movsd" instruction, in an optimized
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// form which is an "unrolled loop".
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#define IN_CACHE_COPY 64 * 1024 // upper limit for movq/movq copy w/SW prefetch
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// Next is a copy that uses the MMX registers to copy 8 bytes at a time,
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// also using the "unrolled loop" optimization. This code uses
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// the software prefetch instruction to get the data into the cache.
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#define UNCACHED_COPY 197 * 1024 // upper limit for movq/movntq w/SW prefetch
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// For larger blocks, which will spill beyond the cache, it's faster to
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// use the Streaming Store instruction MOVNTQ. This write instruction
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// bypasses the cache and writes straight to main memory. This code also
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// uses the software prefetch instruction to pre-read the data.
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// USE 64 * 1024 FOR THIS VALUE IF YOU'RE ALWAYS FILLING A "CLEAN CACHE"
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#define BLOCK_PREFETCH_COPY infinity // no limit for movq/movntq w/block prefetch
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#define CACHEBLOCK 80h // number of 64-byte blocks (cache lines) for block prefetch
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// For the largest size blocks, a special technique called Block Prefetch
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// can be used to accelerate the read operations. Block Prefetch reads
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// one address per cache line, for a series of cache lines, in a short loop.
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// This is faster than using software prefetch. The technique is great for
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// getting maximum read bandwidth, especially in DDR memory systems.
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/*
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================
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idSIMD_3DNow::Memcpy
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optimized memory copy routine that handles all alignment cases and block sizes efficiently
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================
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*/
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void VPCALL idSIMD_3DNow::Memcpy( void *dest, const void *src, const int n ) {
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__asm {
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mov ecx, [n] // number of bytes to copy
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mov edi, [dest] // destination
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mov esi, [src] // source
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mov ebx, ecx // keep a copy of count
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cld
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cmp ecx, TINY_BLOCK_COPY
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jb $memcpy_ic_3 // tiny? skip mmx copy
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cmp ecx, 32*1024 // don't align between 32k-64k because
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jbe $memcpy_do_align // it appears to be slower
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cmp ecx, 64*1024
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jbe $memcpy_align_done
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$memcpy_do_align:
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mov ecx, 8 // a trick that's faster than rep movsb...
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sub ecx, edi // align destination to qword
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and ecx, 111b // get the low bits
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sub ebx, ecx // update copy count
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neg ecx // set up to jump into the array
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add ecx, offset $memcpy_align_done
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jmp ecx // jump to array of movsb's
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align 4
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movsb
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movsb
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movsb
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movsb
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movsb
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movsb
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movsb
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movsb
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$memcpy_align_done: // destination is dword aligned
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mov ecx, ebx // number of bytes left to copy
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shr ecx, 6 // get 64-byte block count
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jz $memcpy_ic_2 // finish the last few bytes
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cmp ecx, IN_CACHE_COPY/64 // too big 4 cache? use uncached copy
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jae $memcpy_uc_test
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// This is small block copy that uses the MMX registers to copy 8 bytes
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// at a time. It uses the "unrolled loop" optimization, and also uses
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// the software prefetch instruction to get the data into the cache.
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align 16
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$memcpy_ic_1: // 64-byte block copies, in-cache copy
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prefetchnta [esi + (200*64/34+192)] // start reading ahead
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movq mm0, [esi+0] // read 64 bits
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movq mm1, [esi+8]
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movq [edi+0], mm0 // write 64 bits
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movq [edi+8], mm1 // note: the normal movq writes the
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movq mm2, [esi+16] // data to cache; a cache line will be
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movq mm3, [esi+24] // allocated as needed, to store the data
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movq [edi+16], mm2
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movq [edi+24], mm3
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movq mm0, [esi+32]
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movq mm1, [esi+40]
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movq [edi+32], mm0
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movq [edi+40], mm1
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movq mm2, [esi+48]
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movq mm3, [esi+56]
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movq [edi+48], mm2
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movq [edi+56], mm3
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add esi, 64 // update source pointer
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add edi, 64 // update destination pointer
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dec ecx // count down
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jnz $memcpy_ic_1 // last 64-byte block?
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$memcpy_ic_2:
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mov ecx, ebx // has valid low 6 bits of the byte count
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$memcpy_ic_3:
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shr ecx, 2 // dword count
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and ecx, 1111b // only look at the "remainder" bits
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neg ecx // set up to jump into the array
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add ecx, offset $memcpy_last_few
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jmp ecx // jump to array of movsd's
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$memcpy_uc_test:
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cmp ecx, UNCACHED_COPY/64 // big enough? use block prefetch copy
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jae $memcpy_bp_1
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$memcpy_64_test:
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or ecx, ecx // tail end of block prefetch will jump here
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jz $memcpy_ic_2 // no more 64-byte blocks left
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// For larger blocks, which will spill beyond the cache, it's faster to
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// use the Streaming Store instruction MOVNTQ. This write instruction
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// bypasses the cache and writes straight to main memory. This code also
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// uses the software prefetch instruction to pre-read the data.
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align 16
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$memcpy_uc_1: // 64-byte blocks, uncached copy
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prefetchnta [esi + (200*64/34+192)] // start reading ahead
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movq mm0,[esi+0] // read 64 bits
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add edi,64 // update destination pointer
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movq mm1,[esi+8]
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add esi,64 // update source pointer
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movq mm2,[esi-48]
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movntq [edi-64], mm0 // write 64 bits, bypassing the cache
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movq mm0,[esi-40] // note: movntq also prevents the CPU
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movntq [edi-56], mm1 // from READING the destination address
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movq mm1,[esi-32] // into the cache, only to be over-written
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movntq [edi-48], mm2 // so that also helps performance
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movq mm2,[esi-24]
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movntq [edi-40], mm0
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movq mm0,[esi-16]
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movntq [edi-32], mm1
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movq mm1,[esi-8]
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movntq [edi-24], mm2
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movntq [edi-16], mm0
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dec ecx
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movntq [edi-8], mm1
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jnz $memcpy_uc_1 // last 64-byte block?
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jmp $memcpy_ic_2 // almost done
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// For the largest size blocks, a special technique called Block Prefetch
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// can be used to accelerate the read operations. Block Prefetch reads
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// one address per cache line, for a series of cache lines, in a short loop.
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// This is faster than using software prefetch, in this case.
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// The technique is great for getting maximum read bandwidth,
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// especially in DDR memory systems.
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$memcpy_bp_1: // large blocks, block prefetch copy
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cmp ecx, CACHEBLOCK // big enough to run another prefetch loop?
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jl $memcpy_64_test // no, back to regular uncached copy
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mov eax, CACHEBLOCK / 2 // block prefetch loop, unrolled 2X
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add esi, CACHEBLOCK * 64 // move to the top of the block
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align 16
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$memcpy_bp_2:
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mov edx, [esi-64] // grab one address per cache line
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mov edx, [esi-128] // grab one address per cache line
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sub esi, 128 // go reverse order
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dec eax // count down the cache lines
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jnz $memcpy_bp_2 // keep grabbing more lines into cache
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mov eax, CACHEBLOCK // now that it's in cache, do the copy
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align 16
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$memcpy_bp_3:
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movq mm0, [esi ] // read 64 bits
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movq mm1, [esi+ 8]
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movq mm2, [esi+16]
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movq mm3, [esi+24]
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movq mm4, [esi+32]
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movq mm5, [esi+40]
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movq mm6, [esi+48]
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movq mm7, [esi+56]
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add esi, 64 // update source pointer
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movntq [edi ], mm0 // write 64 bits, bypassing cache
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movntq [edi+ 8], mm1 // note: movntq also prevents the CPU
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movntq [edi+16], mm2 // from READING the destination address
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movntq [edi+24], mm3 // into the cache, only to be over-written,
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movntq [edi+32], mm4 // so that also helps performance
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movntq [edi+40], mm5
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movntq [edi+48], mm6
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movntq [edi+56], mm7
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add edi, 64 // update dest pointer
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dec eax // count down
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jnz $memcpy_bp_3 // keep copying
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sub ecx, CACHEBLOCK // update the 64-byte block count
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jmp $memcpy_bp_1 // keep processing chunks
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// The smallest copy uses the X86 "movsd" instruction, in an optimized
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// form which is an "unrolled loop". Then it handles the last few bytes.
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align 4
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movsd
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movsd // perform last 1-15 dword copies
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movsd
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movsd
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movsd
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movsd
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movsd
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movsd
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movsd
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movsd // perform last 1-7 dword copies
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movsd
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movsd
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movsd
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movsd
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movsd
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movsd
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$memcpy_last_few: // dword aligned from before movsd's
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mov ecx, ebx // has valid low 2 bits of the byte count
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and ecx, 11b // the last few cows must come home
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jz $memcpy_final // no more, let's leave
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rep movsb // the last 1, 2, or 3 bytes
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$memcpy_final:
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emms // clean up the MMX state
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sfence // flush the write buffer
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mov eax, [dest] // ret value = destination pointer
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}
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}
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#endif /* _MSC_VER */
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