mirror of
https://github.com/dhewm/dhewm3-sdk.git
synced 2024-11-25 14:01:10 +00:00
Fix ./idlib/math/ for x86_64
sizeof(float) != sizeof(long) on this ABI.
This commit is contained in:
parent
bca35dec66
commit
dc86a8a02c
5 changed files with 73 additions and 73 deletions
|
@ -63,17 +63,17 @@ If you have questions concerning this license or the applicable additional terms
|
|||
#define ANGLE2BYTE(x) ( idMath::FtoiFast( (x) * 256.0f / 360.0f ) & 255 )
|
||||
#define BYTE2ANGLE(x) ( (x) * ( 360.0f / 256.0f ) )
|
||||
|
||||
#define FLOATSIGNBITSET(f) ((*(const unsigned long *)&(f)) >> 31)
|
||||
#define FLOATSIGNBITNOTSET(f) ((~(*(const unsigned long *)&(f))) >> 31)
|
||||
#define FLOATNOTZERO(f) ((*(const unsigned long *)&(f)) & ~(1<<31) )
|
||||
#define INTSIGNBITSET(i) (((const unsigned long)(i)) >> 31)
|
||||
#define INTSIGNBITNOTSET(i) ((~((const unsigned long)(i))) >> 31)
|
||||
#define FLOATSIGNBITSET(f) ((*(const unsigned int *)&(f)) >> 31)
|
||||
#define FLOATSIGNBITNOTSET(f) ((~(*(const unsigned int *)&(f))) >> 31)
|
||||
#define FLOATNOTZERO(f) ((*(const unsigned int *)&(f)) & ~(1<<31) )
|
||||
#define INTSIGNBITSET(i) (((const unsigned int)(i)) >> 31)
|
||||
#define INTSIGNBITNOTSET(i) ((~((const unsigned int)(i))) >> 31)
|
||||
|
||||
#define FLOAT_IS_NAN(x) (((*(const unsigned long *)&x) & 0x7f800000) == 0x7f800000)
|
||||
#define FLOAT_IS_INF(x) (((*(const unsigned long *)&x) & 0x7fffffff) == 0x7f800000)
|
||||
#define FLOAT_IS_IND(x) ((*(const unsigned long *)&x) == 0xffc00000)
|
||||
#define FLOAT_IS_DENORMAL(x) (((*(const unsigned long *)&x) & 0x7f800000) == 0x00000000 && \
|
||||
((*(const unsigned long *)&x) & 0x007fffff) != 0x00000000 )
|
||||
#define FLOAT_IS_NAN(x) (((*(const unsigned int *)&x) & 0x7f800000) == 0x7f800000)
|
||||
#define FLOAT_IS_INF(x) (((*(const unsigned int *)&x) & 0x7fffffff) == 0x7f800000)
|
||||
#define FLOAT_IS_IND(x) ((*(const unsigned int *)&x) == 0xffc00000)
|
||||
#define FLOAT_IS_DENORMAL(x) (((*(const unsigned int *)&x) & 0x7f800000) == 0x00000000 && \
|
||||
((*(const unsigned int *)&x) & 0x007fffff) != 0x00000000 )
|
||||
|
||||
#define IEEE_FLT_MANTISSA_BITS 23
|
||||
#define IEEE_FLT_EXPONENT_BITS 8
|
||||
|
@ -183,8 +183,8 @@ public:
|
|||
static float Rint( float f ); // returns the nearest integer
|
||||
static int Ftoi( float f ); // float to int conversion
|
||||
static int FtoiFast( float f ); // fast float to int conversion but uses current FPU round mode (default round nearest)
|
||||
static unsigned long Ftol( float f ); // float to long conversion
|
||||
static unsigned long FtolFast( float ); // fast float to long conversion but uses current FPU round mode (default round nearest)
|
||||
static unsigned int Ftol( float f ); // float to int conversion
|
||||
static unsigned int FtolFast( float ); // fast float to int conversion but uses current FPU round mode (default round nearest)
|
||||
|
||||
static signed char ClampChar( int i );
|
||||
static signed short ClampShort( int i );
|
||||
|
@ -238,11 +238,11 @@ private:
|
|||
|
||||
ID_INLINE float idMath::RSqrt( float x ) {
|
||||
|
||||
long i;
|
||||
int i;
|
||||
float y, r;
|
||||
|
||||
y = x * 0.5f;
|
||||
i = *reinterpret_cast<long *>( &x );
|
||||
i = *reinterpret_cast<int *>( &x );
|
||||
i = 0x5f3759df - ( i >> 1 );
|
||||
r = *reinterpret_cast<float *>( &i );
|
||||
r = r * ( 1.5f - r * r * y );
|
||||
|
@ -824,14 +824,14 @@ ID_INLINE int idMath::FtoiFast( float f ) {
|
|||
#endif
|
||||
}
|
||||
|
||||
ID_INLINE unsigned long idMath::Ftol( float f ) {
|
||||
return (unsigned long) f;
|
||||
ID_INLINE unsigned int idMath::Ftol( float f ) {
|
||||
return (unsigned int) f;
|
||||
}
|
||||
|
||||
ID_INLINE unsigned long idMath::FtolFast( float f ) {
|
||||
ID_INLINE unsigned int idMath::FtolFast( float f ) {
|
||||
#ifdef _WIN32
|
||||
// FIXME: this overflows on 31bits still .. same as FtoiFast
|
||||
unsigned long i;
|
||||
unsigned int i;
|
||||
__asm fld f
|
||||
__asm fistp i // use default rouding mode (round nearest)
|
||||
return i;
|
||||
|
@ -854,7 +854,7 @@ ID_INLINE unsigned long idMath::FtolFast( float f ) {
|
|||
: "m" (f) );
|
||||
return i;
|
||||
#else
|
||||
return (unsigned long) f;
|
||||
return (unsigned int) f;
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
@ -68,8 +68,8 @@ If you have questions concerning this license or the applicable additional terms
|
|||
#define IDVEC4_OFFSET 4
|
||||
|
||||
// Alignment tests
|
||||
#define IS_16BYTE_ALIGNED( x ) ( ( (unsigned long)&x & 0x0F ) == 0 )
|
||||
#define NOT_16BYTE_ALIGNED( x ) ( ( (unsigned long)&x & 0x0F) != 0 )
|
||||
#define IS_16BYTE_ALIGNED( x ) ( ( (unsigned int)&x & 0x0F ) == 0 )
|
||||
#define NOT_16BYTE_ALIGNED( x ) ( ( (unsigned int)&x & 0x0F) != 0 )
|
||||
|
||||
// Aligned storing floats
|
||||
#define ALIGNED_STORE2( ADDR, V0, V1 ) \
|
||||
|
|
|
@ -2499,7 +2499,7 @@ void VPCALL idSIMD_Generic::DeriveTangents( idPlane *planes, idDrawVert *verts,
|
|||
idPlane *planesPtr = planes;
|
||||
for ( i = 0; i < numIndexes; i += 3 ) {
|
||||
idDrawVert *a, *b, *c;
|
||||
unsigned long signBit;
|
||||
unsigned int signBit;
|
||||
float d0[5], d1[5], f, area;
|
||||
idVec3 n, t0, t1;
|
||||
|
||||
|
@ -2540,7 +2540,7 @@ void VPCALL idSIMD_Generic::DeriveTangents( idPlane *planes, idDrawVert *verts,
|
|||
|
||||
// area sign bit
|
||||
area = d0[3] * d1[4] - d0[4] * d1[3];
|
||||
signBit = ( *(unsigned long *)&area ) & ( 1 << 31 );
|
||||
signBit = ( *(unsigned int *)&area ) & ( 1 << 31 );
|
||||
|
||||
// first tangent
|
||||
t0[0] = d0[0] * d1[4] - d0[4] * d1[0];
|
||||
|
@ -2548,7 +2548,7 @@ void VPCALL idSIMD_Generic::DeriveTangents( idPlane *planes, idDrawVert *verts,
|
|||
t0[2] = d0[2] * d1[4] - d0[4] * d1[2];
|
||||
|
||||
f = idMath::RSqrt( t0.x * t0.x + t0.y * t0.y + t0.z * t0.z );
|
||||
*(unsigned long *)&f ^= signBit;
|
||||
*(unsigned int *)&f ^= signBit;
|
||||
|
||||
t0.x *= f;
|
||||
t0.y *= f;
|
||||
|
@ -2560,7 +2560,7 @@ void VPCALL idSIMD_Generic::DeriveTangents( idPlane *planes, idDrawVert *verts,
|
|||
t1[2] = d0[3] * d1[2] - d0[2] * d1[3];
|
||||
|
||||
f = idMath::RSqrt( t1.x * t1.x + t1.y * t1.y + t1.z * t1.z );
|
||||
*(unsigned long *)&f ^= signBit;
|
||||
*(unsigned int *)&f ^= signBit;
|
||||
|
||||
t1.x *= f;
|
||||
t1.y *= f;
|
||||
|
|
|
@ -1017,16 +1017,16 @@ void VPCALL idSIMD_SSE::Dot( float *dst, const idVec3 &constant, const idPlane *
|
|||
ALIGN8_INIT1( unsigned short SIMD_W_zero, 0 );
|
||||
ALIGN8_INIT1( unsigned short SIMD_W_maxShort, 1<<15 );
|
||||
|
||||
ALIGN4_INIT1( unsigned long SIMD_DW_mat2quatShuffle0, (3<<0)|(2<<8)|(1<<16)|(0<<24) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_DW_mat2quatShuffle1, (0<<0)|(1<<8)|(2<<16)|(3<<24) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_DW_mat2quatShuffle2, (1<<0)|(0<<8)|(3<<16)|(2<<24) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_DW_mat2quatShuffle3, (2<<0)|(3<<8)|(0<<16)|(1<<24) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_DW_mat2quatShuffle0, (3<<0)|(2<<8)|(1<<16)|(0<<24) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_DW_mat2quatShuffle1, (0<<0)|(1<<8)|(2<<16)|(3<<24) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_DW_mat2quatShuffle2, (1<<0)|(0<<8)|(3<<16)|(2<<24) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_DW_mat2quatShuffle3, (2<<0)|(3<<8)|(0<<16)|(1<<24) );
|
||||
|
||||
ALIGN4_INIT4( unsigned long SIMD_SP_singleSignBitMask, (unsigned long) ( 1 << 31 ), 0, 0, 0 );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_signBitMask, (unsigned long) ( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_absMask, (unsigned long) ~( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_infinityMask, (unsigned long) ~( 1 << 23 ) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_not, 0xFFFFFFFF );
|
||||
ALIGN4_INIT4( unsigned int SIMD_SP_singleSignBitMask, (unsigned int) ( 1 << 31 ), 0, 0, 0 );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_signBitMask, (unsigned int) ( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_absMask, (unsigned int) ~( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_infinityMask, (unsigned int) ~( 1 << 23 ) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_not, 0xFFFFFFFF );
|
||||
|
||||
ALIGN4_INIT1( float SIMD_SP_zero, 0.0f );
|
||||
ALIGN4_INIT1( float SIMD_SP_half, 0.5f );
|
||||
|
@ -1950,7 +1950,7 @@ float SSE_ATan( float y, float x ) {
|
|||
if ( fabs( y ) > fabs( x ) ) {
|
||||
a = -x / y;
|
||||
d = idMath::HALF_PI;
|
||||
*((unsigned long *)&d) ^= ( *((unsigned long *)&x) ^ *((unsigned long *)&y) ) & (1<<31);
|
||||
*((unsigned int *)&d) ^= ( *((unsigned int *)&x) ^ *((unsigned int *)&y) ) & (1<<31);
|
||||
} else {
|
||||
a = y / x;
|
||||
d = 0.0f;
|
||||
|
@ -11527,7 +11527,7 @@ void VPCALL idSIMD_SSE::BlendJoints( idJointQuat *joints, const idJointQuat *ble
|
|||
ALIGN16( float omega1[4] );
|
||||
ALIGN16( float scale0[4] );
|
||||
ALIGN16( float scale1[4] );
|
||||
ALIGN16( unsigned long signBit[4] );
|
||||
ALIGN16( unsigned int signBit[4] );
|
||||
|
||||
cosom[0] = jointQuat0[0] * blendQuat0[0];
|
||||
cosom[1] = jointQuat0[1] * blendQuat0[1];
|
||||
|
@ -11549,15 +11549,15 @@ void VPCALL idSIMD_SSE::BlendJoints( idJointQuat *joints, const idJointQuat *ble
|
|||
cosom[2] += jointQuat3[2] * blendQuat3[2];
|
||||
cosom[3] += jointQuat3[3] * blendQuat3[3];
|
||||
|
||||
signBit[0] = (*(unsigned long *)&cosom[0]) & ( 1 << 31 );
|
||||
signBit[1] = (*(unsigned long *)&cosom[1]) & ( 1 << 31 );
|
||||
signBit[2] = (*(unsigned long *)&cosom[2]) & ( 1 << 31 );
|
||||
signBit[3] = (*(unsigned long *)&cosom[3]) & ( 1 << 31 );
|
||||
signBit[0] = (*(unsigned int *)&cosom[0]) & ( 1 << 31 );
|
||||
signBit[1] = (*(unsigned int *)&cosom[1]) & ( 1 << 31 );
|
||||
signBit[2] = (*(unsigned int *)&cosom[2]) & ( 1 << 31 );
|
||||
signBit[3] = (*(unsigned int *)&cosom[3]) & ( 1 << 31 );
|
||||
|
||||
(*(unsigned long *)&cosom[0]) ^= signBit[0];
|
||||
(*(unsigned long *)&cosom[1]) ^= signBit[1];
|
||||
(*(unsigned long *)&cosom[2]) ^= signBit[2];
|
||||
(*(unsigned long *)&cosom[3]) ^= signBit[3];
|
||||
(*(unsigned int *)&cosom[0]) ^= signBit[0];
|
||||
(*(unsigned int *)&cosom[1]) ^= signBit[1];
|
||||
(*(unsigned int *)&cosom[2]) ^= signBit[2];
|
||||
(*(unsigned int *)&cosom[3]) ^= signBit[3];
|
||||
|
||||
scale0[0] = 1.0f - cosom[0] * cosom[0];
|
||||
scale0[1] = 1.0f - cosom[1] * cosom[1];
|
||||
|
@ -11604,10 +11604,10 @@ void VPCALL idSIMD_SSE::BlendJoints( idJointQuat *joints, const idJointQuat *ble
|
|||
scale1[2] = SSE_SinZeroHalfPI( omega1[2] ) * sinom[2];
|
||||
scale1[3] = SSE_SinZeroHalfPI( omega1[3] ) * sinom[3];
|
||||
|
||||
(*(unsigned long *)&scale1[0]) ^= signBit[0];
|
||||
(*(unsigned long *)&scale1[1]) ^= signBit[1];
|
||||
(*(unsigned long *)&scale1[2]) ^= signBit[2];
|
||||
(*(unsigned long *)&scale1[3]) ^= signBit[3];
|
||||
(*(unsigned int *)&scale1[0]) ^= signBit[0];
|
||||
(*(unsigned int *)&scale1[1]) ^= signBit[1];
|
||||
(*(unsigned int *)&scale1[2]) ^= signBit[2];
|
||||
(*(unsigned int *)&scale1[3]) ^= signBit[3];
|
||||
|
||||
jointQuat0[0] = scale0[0] * jointQuat0[0] + scale1[0] * blendQuat0[0];
|
||||
jointQuat0[1] = scale0[1] * jointQuat0[1] + scale1[1] * blendQuat0[1];
|
||||
|
@ -11663,13 +11663,13 @@ void VPCALL idSIMD_SSE::BlendJoints( idJointQuat *joints, const idJointQuat *ble
|
|||
float omega;
|
||||
float scale0;
|
||||
float scale1;
|
||||
unsigned long signBit;
|
||||
unsigned int signBit;
|
||||
|
||||
cosom = jointQuat.x * blendQuat.x + jointQuat.y * blendQuat.y + jointQuat.z * blendQuat.z + jointQuat.w * blendQuat.w;
|
||||
|
||||
signBit = (*(unsigned long *)&cosom) & ( 1 << 31 );
|
||||
signBit = (*(unsigned int *)&cosom) & ( 1 << 31 );
|
||||
|
||||
(*(unsigned long *)&cosom) ^= signBit;
|
||||
(*(unsigned int *)&cosom) ^= signBit;
|
||||
|
||||
scale0 = 1.0f - cosom * cosom;
|
||||
scale0 = ( scale0 <= 0.0f ) ? SIMD_SP_tiny[0] : scale0;
|
||||
|
@ -11678,7 +11678,7 @@ void VPCALL idSIMD_SSE::BlendJoints( idJointQuat *joints, const idJointQuat *ble
|
|||
scale0 = idMath::Sin16( ( 1.0f - lerp ) * omega ) * sinom;
|
||||
scale1 = idMath::Sin16( lerp * omega ) * sinom;
|
||||
|
||||
(*(unsigned long *)&scale1) ^= signBit;
|
||||
(*(unsigned int *)&scale1) ^= signBit;
|
||||
|
||||
jointQuat.x = scale0 * jointQuat.x + scale1 * blendQuat.x;
|
||||
jointQuat.y = scale0 * jointQuat.y + scale1 * blendQuat.y;
|
||||
|
@ -13664,7 +13664,7 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
|
||||
for ( i = 0; i <= numIndexes - 12; i += 12 ) {
|
||||
idDrawVert *a, *b, *c;
|
||||
ALIGN16( unsigned long signBit[4] );
|
||||
ALIGN16( unsigned int signBit[4] );
|
||||
ALIGN16( float d0[4] );
|
||||
ALIGN16( float d1[4] );
|
||||
ALIGN16( float d2[4] );
|
||||
|
@ -13967,10 +13967,10 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
tmp[2] -= d4[2] * d8[2];
|
||||
tmp[3] -= d4[3] * d8[3];
|
||||
|
||||
signBit[0] = ( *(unsigned long *)&tmp[0] ) & ( 1 << 31 );
|
||||
signBit[1] = ( *(unsigned long *)&tmp[1] ) & ( 1 << 31 );
|
||||
signBit[2] = ( *(unsigned long *)&tmp[2] ) & ( 1 << 31 );
|
||||
signBit[3] = ( *(unsigned long *)&tmp[3] ) & ( 1 << 31 );
|
||||
signBit[0] = ( *(unsigned int *)&tmp[0] ) & ( 1 << 31 );
|
||||
signBit[1] = ( *(unsigned int *)&tmp[1] ) & ( 1 << 31 );
|
||||
signBit[2] = ( *(unsigned int *)&tmp[2] ) & ( 1 << 31 );
|
||||
signBit[3] = ( *(unsigned int *)&tmp[3] ) & ( 1 << 31 );
|
||||
|
||||
// first tangent
|
||||
t0[0] = d0[0] * d9[0];
|
||||
|
@ -14023,10 +14023,10 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
tmp[2] = idMath::RSqrt( tmp[2] );
|
||||
tmp[3] = idMath::RSqrt( tmp[3] );
|
||||
|
||||
*(unsigned long *)&tmp[0] ^= signBit[0];
|
||||
*(unsigned long *)&tmp[1] ^= signBit[1];
|
||||
*(unsigned long *)&tmp[2] ^= signBit[2];
|
||||
*(unsigned long *)&tmp[3] ^= signBit[3];
|
||||
*(unsigned int *)&tmp[0] ^= signBit[0];
|
||||
*(unsigned int *)&tmp[1] ^= signBit[1];
|
||||
*(unsigned int *)&tmp[2] ^= signBit[2];
|
||||
*(unsigned int *)&tmp[3] ^= signBit[3];
|
||||
|
||||
t0[0] *= tmp[0];
|
||||
t0[1] *= tmp[1];
|
||||
|
@ -14094,10 +14094,10 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
tmp[2] = idMath::RSqrt( tmp[2] );
|
||||
tmp[3] = idMath::RSqrt( tmp[3] );
|
||||
|
||||
*(unsigned long *)&tmp[0] ^= signBit[0];
|
||||
*(unsigned long *)&tmp[1] ^= signBit[1];
|
||||
*(unsigned long *)&tmp[2] ^= signBit[2];
|
||||
*(unsigned long *)&tmp[3] ^= signBit[3];
|
||||
*(unsigned int *)&tmp[0] ^= signBit[0];
|
||||
*(unsigned int *)&tmp[1] ^= signBit[1];
|
||||
*(unsigned int *)&tmp[2] ^= signBit[2];
|
||||
*(unsigned int *)&tmp[3] ^= signBit[3];
|
||||
|
||||
t3[0] *= tmp[0];
|
||||
t3[1] *= tmp[1];
|
||||
|
@ -14220,7 +14220,7 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
|
||||
for ( ; i < numIndexes; i += 3 ) {
|
||||
idDrawVert *a, *b, *c;
|
||||
ALIGN16( unsigned long signBit[4] );
|
||||
ALIGN16( unsigned int signBit[4] );
|
||||
float d0, d1, d2, d3, d4;
|
||||
float d5, d6, d7, d8, d9;
|
||||
float n0, n1, n2;
|
||||
|
@ -14446,7 +14446,7 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
|
||||
// area sign bit
|
||||
tmp = d3 * d9 - d4 * d8;
|
||||
signBit[0] = ( *(unsigned long *)&tmp ) & ( 1 << 31 );
|
||||
signBit[0] = ( *(unsigned int *)&tmp ) & ( 1 << 31 );
|
||||
|
||||
// first tangent
|
||||
t0 = d0 * d9 - d4 * d5;
|
||||
|
@ -14454,7 +14454,7 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
t2 = d2 * d9 - d4 * d7;
|
||||
|
||||
tmp = idMath::RSqrt( t0 * t0 + t1 * t1 + t2 * t2 );
|
||||
*(unsigned long *)&tmp ^= signBit[0];
|
||||
*(unsigned int *)&tmp ^= signBit[0];
|
||||
|
||||
t0 *= tmp;
|
||||
t1 *= tmp;
|
||||
|
@ -14466,7 +14466,7 @@ void VPCALL idSIMD_SSE::DeriveTangents( idPlane *planes, idDrawVert *verts, cons
|
|||
t5 = d3 * d7 - d2 * d8;
|
||||
|
||||
tmp = idMath::RSqrt( t3 * t3 + t4 * t4 + t5 * t5 );
|
||||
*(unsigned long *)&tmp ^= signBit[0];
|
||||
*(unsigned int *)&tmp ^= signBit[0];
|
||||
|
||||
t3 *= tmp;
|
||||
t4 *= tmp;
|
||||
|
|
|
@ -261,10 +261,10 @@ void VPCALL idSIMD_SSE2::CmpLT( byte *dst, const byte bitNum, const float *src0,
|
|||
ALIGN8_INIT1( unsigned short SIMD_W_zero, 0 );
|
||||
ALIGN8_INIT1( unsigned short SIMD_W_maxShort, 1<<15 );
|
||||
|
||||
ALIGN4_INIT4( unsigned long SIMD_SP_singleSignBitMask, (unsigned long) ( 1 << 31 ), 0, 0, 0 );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_signBitMask, (unsigned long) ( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_absMask, (unsigned long) ~( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned long SIMD_SP_infinityMask, (unsigned long) ~( 1 << 23 ) );
|
||||
ALIGN4_INIT4( unsigned int SIMD_SP_singleSignBitMask, (unsigned int) ( 1 << 31 ), 0, 0, 0 );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_signBitMask, (unsigned int) ( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_absMask, (unsigned int) ~( 1 << 31 ) );
|
||||
ALIGN4_INIT1( unsigned int SIMD_SP_infinityMask, (unsigned int) ~( 1 << 23 ) );
|
||||
|
||||
ALIGN4_INIT1( float SIMD_SP_zero, 0.0f );
|
||||
ALIGN4_INIT1( float SIMD_SP_one, 1.0f );
|
||||
|
|
Loading…
Reference in a new issue