mirror of
https://bitbucket.org/CPMADevs/cnq3
synced 2024-11-30 15:52:16 +00:00
fc9465caab
aside from the speed improvements, this also makes for nicer code in the renderer interaction with libjpeg, thanks to mem_dest support etc
252 lines
7.9 KiB
C
252 lines
7.9 KiB
C
/*
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* AltiVec optimizations for libjpeg-turbo
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*
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* Copyright (C) 2014-2015, D. R. Commander. All Rights Reserved.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*/
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/* INTEGER QUANTIZATION AND SAMPLE CONVERSION */
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#include "jsimd_altivec.h"
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/* NOTE: The address will either be aligned or offset by 8 bytes, so we can
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* always get the data we want by using a single vector load (although we may
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* have to permute the result.)
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*/
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#if __BIG_ENDIAN__
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#define LOAD_ROW(row) { \
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elemptr = sample_data[row] + start_col; \
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in##row = vec_ld(0, elemptr); \
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if ((size_t)elemptr & 15) \
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in##row = vec_perm(in##row, in##row, vec_lvsl(0, elemptr)); \
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}
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#else
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#define LOAD_ROW(row) { \
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elemptr = sample_data[row] + start_col; \
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in##row = vec_vsx_ld(0, elemptr); \
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}
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#endif
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void
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jsimd_convsamp_altivec (JSAMPARRAY sample_data, JDIMENSION start_col,
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DCTELEM *workspace)
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{
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JSAMPROW elemptr;
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__vector unsigned char in0, in1, in2, in3, in4, in5, in6, in7;
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__vector short out0, out1, out2, out3, out4, out5, out6, out7;
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/* Constants */
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__vector short pw_centerjsamp = { __8X(CENTERJSAMPLE) };
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__vector unsigned char pb_zero = { __16X(0) };
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LOAD_ROW(0);
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LOAD_ROW(1);
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LOAD_ROW(2);
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LOAD_ROW(3);
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LOAD_ROW(4);
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LOAD_ROW(5);
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LOAD_ROW(6);
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LOAD_ROW(7);
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out0 = (__vector short)VEC_UNPACKHU(in0);
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out1 = (__vector short)VEC_UNPACKHU(in1);
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out2 = (__vector short)VEC_UNPACKHU(in2);
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out3 = (__vector short)VEC_UNPACKHU(in3);
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out4 = (__vector short)VEC_UNPACKHU(in4);
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out5 = (__vector short)VEC_UNPACKHU(in5);
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out6 = (__vector short)VEC_UNPACKHU(in6);
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out7 = (__vector short)VEC_UNPACKHU(in7);
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out0 = vec_sub(out0, pw_centerjsamp);
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out1 = vec_sub(out1, pw_centerjsamp);
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out2 = vec_sub(out2, pw_centerjsamp);
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out3 = vec_sub(out3, pw_centerjsamp);
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out4 = vec_sub(out4, pw_centerjsamp);
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out5 = vec_sub(out5, pw_centerjsamp);
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out6 = vec_sub(out6, pw_centerjsamp);
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out7 = vec_sub(out7, pw_centerjsamp);
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vec_st(out0, 0, workspace);
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vec_st(out1, 16, workspace);
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vec_st(out2, 32, workspace);
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vec_st(out3, 48, workspace);
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vec_st(out4, 64, workspace);
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vec_st(out5, 80, workspace);
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vec_st(out6, 96, workspace);
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vec_st(out7, 112, workspace);
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}
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#define WORD_BIT 16
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/* There is no AltiVec 16-bit unsigned multiply instruction, hence this.
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We basically need an unsigned equivalent of vec_madds(). */
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#define MULTIPLY(vs0, vs1, out) { \
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tmpe = vec_mule((__vector unsigned short)vs0, \
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(__vector unsigned short)vs1); \
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tmpo = vec_mulo((__vector unsigned short)vs0, \
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(__vector unsigned short)vs1); \
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out = (__vector short)vec_perm((__vector unsigned short)tmpe, \
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(__vector unsigned short)tmpo, \
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shift_pack_index); \
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}
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void
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jsimd_quantize_altivec (JCOEFPTR coef_block, DCTELEM *divisors,
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DCTELEM *workspace)
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{
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__vector short row0, row1, row2, row3, row4, row5, row6, row7,
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row0s, row1s, row2s, row3s, row4s, row5s, row6s, row7s,
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corr0, corr1, corr2, corr3, corr4, corr5, corr6, corr7,
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recip0, recip1, recip2, recip3, recip4, recip5, recip6, recip7,
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scale0, scale1, scale2, scale3, scale4, scale5, scale6, scale7;
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__vector unsigned int tmpe, tmpo;
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/* Constants */
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__vector unsigned short pw_word_bit_m1 = { __8X(WORD_BIT - 1) };
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#if __BIG_ENDIAN__
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__vector unsigned char shift_pack_index =
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{0,1,16,17,4,5,20,21,8,9,24,25,12,13,28,29};
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#else
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__vector unsigned char shift_pack_index =
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{2,3,18,19,6,7,22,23,10,11,26,27,14,15,30,31};
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#endif
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row0 = vec_ld(0, workspace);
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row1 = vec_ld(16, workspace);
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row2 = vec_ld(32, workspace);
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row3 = vec_ld(48, workspace);
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row4 = vec_ld(64, workspace);
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row5 = vec_ld(80, workspace);
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row6 = vec_ld(96, workspace);
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row7 = vec_ld(112, workspace);
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/* Branch-less absolute value */
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row0s = vec_sra(row0, pw_word_bit_m1);
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row1s = vec_sra(row1, pw_word_bit_m1);
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row2s = vec_sra(row2, pw_word_bit_m1);
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row3s = vec_sra(row3, pw_word_bit_m1);
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row4s = vec_sra(row4, pw_word_bit_m1);
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row5s = vec_sra(row5, pw_word_bit_m1);
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row6s = vec_sra(row6, pw_word_bit_m1);
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row7s = vec_sra(row7, pw_word_bit_m1);
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row0 = vec_xor(row0, row0s);
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row1 = vec_xor(row1, row1s);
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row2 = vec_xor(row2, row2s);
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row3 = vec_xor(row3, row3s);
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row4 = vec_xor(row4, row4s);
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row5 = vec_xor(row5, row5s);
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row6 = vec_xor(row6, row6s);
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row7 = vec_xor(row7, row7s);
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row0 = vec_sub(row0, row0s);
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row1 = vec_sub(row1, row1s);
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row2 = vec_sub(row2, row2s);
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row3 = vec_sub(row3, row3s);
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row4 = vec_sub(row4, row4s);
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row5 = vec_sub(row5, row5s);
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row6 = vec_sub(row6, row6s);
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row7 = vec_sub(row7, row7s);
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corr0 = vec_ld(DCTSIZE2 * 2, divisors);
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corr1 = vec_ld(DCTSIZE2 * 2 + 16, divisors);
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corr2 = vec_ld(DCTSIZE2 * 2 + 32, divisors);
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corr3 = vec_ld(DCTSIZE2 * 2 + 48, divisors);
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corr4 = vec_ld(DCTSIZE2 * 2 + 64, divisors);
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corr5 = vec_ld(DCTSIZE2 * 2 + 80, divisors);
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corr6 = vec_ld(DCTSIZE2 * 2 + 96, divisors);
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corr7 = vec_ld(DCTSIZE2 * 2 + 112, divisors);
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row0 = vec_add(row0, corr0);
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row1 = vec_add(row1, corr1);
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row2 = vec_add(row2, corr2);
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row3 = vec_add(row3, corr3);
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row4 = vec_add(row4, corr4);
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row5 = vec_add(row5, corr5);
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row6 = vec_add(row6, corr6);
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row7 = vec_add(row7, corr7);
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recip0 = vec_ld(0, divisors);
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recip1 = vec_ld(16, divisors);
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recip2 = vec_ld(32, divisors);
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recip3 = vec_ld(48, divisors);
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recip4 = vec_ld(64, divisors);
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recip5 = vec_ld(80, divisors);
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recip6 = vec_ld(96, divisors);
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recip7 = vec_ld(112, divisors);
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MULTIPLY(row0, recip0, row0);
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MULTIPLY(row1, recip1, row1);
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MULTIPLY(row2, recip2, row2);
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MULTIPLY(row3, recip3, row3);
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MULTIPLY(row4, recip4, row4);
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MULTIPLY(row5, recip5, row5);
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MULTIPLY(row6, recip6, row6);
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MULTIPLY(row7, recip7, row7);
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scale0 = vec_ld(DCTSIZE2 * 4, divisors);
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scale1 = vec_ld(DCTSIZE2 * 4 + 16, divisors);
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scale2 = vec_ld(DCTSIZE2 * 4 + 32, divisors);
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scale3 = vec_ld(DCTSIZE2 * 4 + 48, divisors);
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scale4 = vec_ld(DCTSIZE2 * 4 + 64, divisors);
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scale5 = vec_ld(DCTSIZE2 * 4 + 80, divisors);
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scale6 = vec_ld(DCTSIZE2 * 4 + 96, divisors);
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scale7 = vec_ld(DCTSIZE2 * 4 + 112, divisors);
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MULTIPLY(row0, scale0, row0);
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MULTIPLY(row1, scale1, row1);
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MULTIPLY(row2, scale2, row2);
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MULTIPLY(row3, scale3, row3);
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MULTIPLY(row4, scale4, row4);
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MULTIPLY(row5, scale5, row5);
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MULTIPLY(row6, scale6, row6);
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MULTIPLY(row7, scale7, row7);
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row0 = vec_xor(row0, row0s);
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row1 = vec_xor(row1, row1s);
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row2 = vec_xor(row2, row2s);
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row3 = vec_xor(row3, row3s);
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row4 = vec_xor(row4, row4s);
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row5 = vec_xor(row5, row5s);
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row6 = vec_xor(row6, row6s);
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row7 = vec_xor(row7, row7s);
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row0 = vec_sub(row0, row0s);
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row1 = vec_sub(row1, row1s);
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row2 = vec_sub(row2, row2s);
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row3 = vec_sub(row3, row3s);
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row4 = vec_sub(row4, row4s);
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row5 = vec_sub(row5, row5s);
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row6 = vec_sub(row6, row6s);
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row7 = vec_sub(row7, row7s);
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vec_st(row0, 0, coef_block);
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vec_st(row1, 16, coef_block);
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vec_st(row2, 32, coef_block);
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vec_st(row3, 48, coef_block);
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vec_st(row4, 64, coef_block);
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vec_st(row5, 80, coef_block);
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vec_st(row6, 96, coef_block);
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vec_st(row7, 112, coef_block);
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}
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