mirror of
https://github.com/ZDoom/Raze.git
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228 lines
6.2 KiB
C++
228 lines
6.2 KiB
C++
/*
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**
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**
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**---------------------------------------------------------------------------
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** Copyright 2005-2016 Randy Heit
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** Copyright 2005-2016 Christoph Oelckers
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** All rights reserved.
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**
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** Redistribution and use in source and binary forms, with or without
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** modification, are permitted provided that the following conditions
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** are met:
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**
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** 1. Redistributions of source code must retain the above copyright
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** notice, this list of conditions and the following disclaimer.
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** 2. Redistributions in binary form must reproduce the above copyright
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** notice, this list of conditions and the following disclaimer in the
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** documentation and/or other materials provided with the distribution.
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** 3. The name of the author may not be used to endorse or promote products
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** derived from this software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**---------------------------------------------------------------------------
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**
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*/
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#include <stdlib.h>
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#include <string.h>
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#include "x86.h"
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CPUInfo CPU;
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#if !defined(__amd64__) && !defined(__i386__) && !defined(_M_IX86) && !defined(_M_X64)
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void CheckCPUID(CPUInfo *cpu)
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{
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memset(cpu, 0, sizeof(*cpu));
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cpu->DataL1LineSize = 32; // Assume a 32-byte cache line
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}
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FString DumpCPUInfo(const CPUInfo *cpu)
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{
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return FString();
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}
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#else
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#ifdef _MSC_VER
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#include <intrin.h>
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#endif
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#include <emmintrin.h>
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#ifdef __GNUC__
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#define __cpuidex(output, func, subfunc) \
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__asm__ __volatile__("cpuid" \
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: "=a" ((output)[0]), "=b" ((output)[1]), "=c" ((output)[2]), "=d" ((output)[3]) \
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: "a" (func), "c" (subfunc));
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#define __cpuid(output, func) __cpuidex(output, func, 0)
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#endif
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void CheckCPUID(CPUInfo *cpu)
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{
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int foo[4];
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unsigned int maxext;
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memset(cpu, 0, sizeof(*cpu));
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cpu->DataL1LineSize = 32; // Assume a 32-byte cache line
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// Get vendor ID
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__cpuid(foo, 0);
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const int maxid = foo[0];
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cpu->dwVendorID[0] = foo[1];
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cpu->dwVendorID[1] = foo[3];
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cpu->dwVendorID[2] = foo[2];
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if (foo[1] == MAKE_ID('A','u','t','h') &&
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foo[3] == MAKE_ID('e','n','t','i') &&
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foo[2] == MAKE_ID('c','A','M','D'))
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{
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cpu->bIsAMD = true;
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}
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// Get features flags and other info
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__cpuid(foo, 1);
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cpu->FeatureFlags[0] = foo[1]; // Store brand index and other stuff
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cpu->FeatureFlags[1] = foo[2]; // Store extended feature flags
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cpu->FeatureFlags[2] = foo[3]; // Store feature flags
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cpu->HyperThreading = (foo[3] & (1 << 28)) > 0;
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// If CLFLUSH instruction is supported, get the real cache line size.
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if (foo[3] & (1 << 19))
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{
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cpu->DataL1LineSize = (foo[1] & 0xFF00) >> (8 - 3);
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}
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cpu->Stepping = foo[0] & 0x0F;
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cpu->Type = (foo[0] & 0x3000) >> 12; // valid on Intel only
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cpu->Model = (foo[0] & 0xF0) >> 4;
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cpu->Family = (foo[0] & 0xF00) >> 8;
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if (cpu->Family == 15)
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{ // Add extended family.
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cpu->Family += (foo[0] >> 20) & 0xFF;
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}
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if (cpu->Family == 6 || cpu->Family == 15)
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{ // Add extended model ID.
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cpu->Model |= (foo[0] >> 12) & 0xF0;
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}
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// Check for extended functions.
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__cpuid(foo, 0x80000000);
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maxext = (unsigned int)foo[0];
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if (maxext >= 0x80000004)
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{ // Get processor brand string.
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__cpuid((int *)&cpu->dwCPUString[0], 0x80000002);
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__cpuid((int *)&cpu->dwCPUString[4], 0x80000003);
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__cpuid((int *)&cpu->dwCPUString[8], 0x80000004);
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}
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if (cpu->bIsAMD)
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{
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if (maxext >= 0x80000005)
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{ // Get data L1 cache info.
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__cpuid(foo, 0x80000005);
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cpu->AMD_DataL1Info = foo[2];
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}
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if (maxext >= 0x80000001)
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{ // Get AMD-specific feature flags.
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__cpuid(foo, 0x80000001);
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cpu->AMDStepping = foo[0] & 0x0F;
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cpu->AMDModel = (foo[0] & 0xF0) >> 4;
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cpu->AMDFamily = (foo[0] & 0xF00) >> 8;
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if (cpu->AMDFamily == 15)
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{ // Add extended model and family.
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cpu->AMDFamily += (foo[0] >> 20) & 0xFF;
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cpu->AMDModel |= (foo[0] >> 12) & 0xF0;
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}
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cpu->FeatureFlags[3] = foo[3]; // AMD feature flags
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}
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}
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if (maxid >= 7)
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{
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__cpuidex(foo, 7, 0);
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cpu->FeatureFlags[4] = foo[1];
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cpu->FeatureFlags[5] = foo[2];
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cpu->FeatureFlags[6] = foo[3];
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__cpuidex(foo, 7, 1);
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cpu->FeatureFlags[7] = foo[0];
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}
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}
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FString DumpCPUInfo(const CPUInfo *cpu)
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{
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char cpustring[4*4*3+1];
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// Why does Intel right-justify this string (on P4s)
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// or add extra spaces (on Cores)?
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const char *f = cpu->CPUString;
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char *t;
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// Skip extra whitespace at the beginning.
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while (*f == ' ')
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{
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++f;
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}
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// Copy string to temp buffer, but condense consecutive
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// spaces to a single space character.
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for (t = cpustring; *f != '\0'; ++f)
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{
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if (*f == ' ' && *(f - 1) == ' ')
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{
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continue;
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}
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*t++ = *f;
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}
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*t = '\0';
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FString out;
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if (cpu->VendorID[0])
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{
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out.Format("CPU Vendor ID: %s\n", cpu->VendorID);
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if (cpustring[0])
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{
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out.AppendFormat(" Name: %s\n", cpustring);
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}
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if (cpu->bIsAMD)
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{
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out.AppendFormat(" Family %d (%d), Model %d, Stepping %d\n",
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cpu->Family, cpu->AMDFamily, cpu->AMDModel, cpu->AMDStepping);
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}
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else
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{
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out.AppendFormat(" Family %d, Model %d, Stepping %d\n",
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cpu->Family, cpu->Model, cpu->Stepping);
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}
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out.AppendFormat(" Features:");
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if (cpu->bSSE2) out += (" SSE2");
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if (cpu->bSSE3) out += (" SSE3");
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if (cpu->bSSSE3) out += (" SSSE3");
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if (cpu->bSSE41) out += (" SSE4.1");
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if (cpu->bSSE42) out += (" SSE4.2");
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if (cpu->bAVX) out += (" AVX");
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if (cpu->bAVX2) out += (" AVX2");
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if (cpu->bAVX512_F) out += (" AVX512");
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if (cpu->bF16C) out += (" F16C");
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if (cpu->bFMA3) out += (" FMA3");
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if (cpu->bBMI1) out += (" BMI1");
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if (cpu->bBMI2) out += (" BMI2");
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if (cpu->HyperThreading) out += (" HyperThreading");
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out += ("\n");
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}
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return out;
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}
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#endif
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