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Pull commit eeb67bcec3
from GZDoom: Use RDTSC equivalent on AARCH64.
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2 changed files with 16 additions and 6 deletions
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@ -76,8 +76,9 @@ inline uint64_t rdtsc()
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while (upper != temp);
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return (static_cast<unsigned long long>(upper) << 32) | lower;
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#elif defined __aarch64__
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// TODO: Implement and test on ARM64
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return 0;
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uint64_t vct;
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asm volatile("mrs %0, cntvct_el0":"=r"(vct));
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return vct;
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#elif defined __i386__
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if (CPU.bRDTSC)
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{
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@ -186,14 +187,15 @@ inline uint64_t rdtsc()
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unsigned int lower, upper, temp;
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do
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{
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asm volatile ("mftbu %0 \n mftb %1 \n mftbu %2 \n"
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asm volatile ("mftbu %0 \n mftb %1 \n mftbu %2 \n"
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: "=r"(upper), "=r"(lower), "=r"(temp));
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}
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while (upper != temp);
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return (static_cast<unsigned long long>(upper) << 32) | lower;
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#elif defined __aarch64__
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// TODO: Implement and test on ARM64
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return 0;
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uint64_t vct;
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asm volatile("mrs %0, cntvct_el0":"=r"(vct));
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return vct;
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#elif defined __i386__ // i386
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if (CPU.bRDTSC)
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{
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@ -144,7 +144,15 @@ void CalculateCPUSpeed()
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{
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PerfAvailable = false;
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PerfToMillisec = PerfToSec = 0.;
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#ifdef __linux__
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#ifdef __aarch64__
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// [MK] on aarch64 rather than having to calculate cpu speed, there is
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// already an independent frequency for the perf timer
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uint64_t frq;
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asm volatile("mrs %0, cntfrq_el0":"=r"(frq));
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PerfAvailable = true;
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PerfToSec = 1./frq;
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PerfToMillisec = PerfToSec*1000.;
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#elif defined(__linux__)
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// [MK] read from perf values if we can
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struct perf_event_attr pe;
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memset(&pe,0,sizeof(struct perf_event_attr));
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