From 54c29258d8b85c7a61061f44695d00d53b977e35 Mon Sep 17 00:00:00 2001 From: Christoph Oelckers Date: Wed, 1 Jul 2020 22:44:09 +0200 Subject: [PATCH] - removed a large bunch of unused dynamic tile names. --- source/games/duke/src/duke3d.h | 6 - source/games/duke/src/namesdyn.h | 1060 ------------------------ source/games/duke/src/zz_namesdyn.cpp | 1062 ------------------------- source/games/duke/src/zz_savegame.cpp | 10 - source/games/duke/src/zz_sbar.cpp | 4 +- 5 files changed, 2 insertions(+), 2140 deletions(-) diff --git a/source/games/duke/src/duke3d.h b/source/games/duke/src/duke3d.h index 95c384d8d..d72e0007a 100644 --- a/source/games/duke/src/duke3d.h +++ b/source/games/duke/src/duke3d.h @@ -85,13 +85,7 @@ enum { #define PACKBUF_SIZE 32768 -#define TILE_SAVESHOT (MAXTILES-1) -#define TILE_LOADSHOT (MAXTILES-3) -#define TILE_TILT (MAXTILES-2) -#define TILE_ANIM (MAXTILES-4) #define TILE_VIEWSCR (MAXTILES-5) -// Reserved: TILE_VIEWSCR_1 (MAXTILES-6) -// Reserved: TILE_VIEWSCR_2 (MAXTILES-7) EDUKE32_STATIC_ASSERT(7 <= MAXTILES-MAXUSERTILES); // sprites with these statnums should be considered for fixing diff --git a/source/games/duke/src/namesdyn.h b/source/games/duke/src/namesdyn.h index e07f7f586..6811b034d 100644 --- a/source/games/duke/src/namesdyn.h +++ b/source/games/duke/src/namesdyn.h @@ -1428,572 +1428,41 @@ BEGIN_DUKE_NS #define JURYGUY__STATICRR -1142 #define RRTILE11__STATICRR -11 #define RPG2SPRITE__STATICRR -14 -#define RRTILE18__STATICRR -18 -#define RRTILE19__STATICRR -19 -#define RRTILE34__STATICRR -34 -#define RRTILE35__STATICRR -35 #define DESTRUCTO__STATICRR -36 -#define RRTILE38__STATICRR -38 -#define RRTILE43__STATICRR -43 #define GUTMETER__STATICRR -62 -#define RRTILE63__STATICRR -63 -#define RRTILE64__STATICRR -64 -#define RRTILE65__STATICRR -65 -#define RRTILE66__STATICRR -66 -#define RRTILE67__STATICRR -67 -#define RRTILE68__STATICRR -68 #define SOUNDFX__STATICRR -71 #define MOTOAMMO__STATICRR -78 #define UFOBEAM__STATICRR -252 -#define RRTILE280__STATICRR -280 -#define RRTILE281__STATICRR -281 -#define RRTILE282__STATICRR -282 -#define RRTILE283__STATICRR -283 -#define RRTILE285__STATICRR -285 -#define RRTILE286__STATICRR -286 -#define RRTILE287__STATICRR -287 -#define RRTILE288__STATICRR -288 -#define RRTILE289__STATICRR -289 -#define RRTILE290__STATICRR -290 -#define RRTILE291__STATICRR -291 -#define RRTILE292__STATICRR -292 -#define RRTILE293__STATICRR -293 -#define RRTILE295__STATICRR -295 -#define RRTILE296__STATICRR -296 -#define RRTILE297__STATICRR -297 #define CDPLAYER__STATICRR -370 -#define RRTILE380__STATICRR -380 -#define RRTILE403__STATICRR -403 -#define RRTILE409__STATICRR -409 #define GUTMETER_LIGHT1__STATICRR -920 #define GUTMETER_LIGHT2__STATICRR -921 #define GUTMETER_LIGHT3__STATICRR -922 #define GUTMETER_LIGHT4__STATICRR -923 #define AMMO_ICON__STATICRR -930 -#define RRTILE1076__STATICRR -1076 #define MUD__STATICRR -1420 #define EXPLOSION3__STATICRR -1442 -#define RRTILE1636__STATICRR -1636 #define WEAPONBAR__STATICRR -1649 -#define RRTILE1752__STATICRR -1752 #define RPG2__STATICRR -1781 -#define RRTILE1790__STATICRR -1790 -#define RRTILE1792__STATICRR -1792 -#define RRTILE1801__STATICRR -1801 -#define RRTILE1805__STATICRR -1805 -#define RRTILE1807__STATICRR -1807 -#define RRTILE1808__STATICRR -1808 -#define RRTILE1812__STATICRR -1812 -#define RRTILE1814__STATICRR -1814 -#define RRTILE1817__STATICRR -1817 -#define RRTILE1821__STATICRR -1821 -#define RRTILE1824__STATICRR -1824 -#define RRTILE1826__STATICRR -1826 -#define RRTILE1850__STATICRR -1850 -#define RRTILE1851__STATICRR -1851 -#define RRTILE1856__STATICRR -1856 -#define RRTILE1877__STATICRR -1877 -#define RRTILE1878__STATICRR -1878 -#define RRTILE1938__STATICRR -1938 -#define RRTILE1939__STATICRR -1939 -#define RRTILE1942__STATICRR -1942 -#define RRTILE1944__STATICRR -1944 -#define RRTILE1945__STATICRR -1945 -#define RRTILE1947__STATICRR -1947 -#define RRTILE1951__STATICRR -1951 -#define RRTILE1952__STATICRR -1952 -#define RRTILE1953__STATICRR -1953 -#define RRTILE1961__STATICRR -1961 -#define RRTILE1964__STATICRR -1964 -#define RRTILE1973__STATICRR -1973 -#define RRTILE1985__STATICRR -1985 -#define RRTILE1986__STATICRR -1986 -#define RRTILE1987__STATICRR -1987 -#define RRTILE1988__STATICRR -1988 -#define RRTILE1990__STATICRR -1990 -#define RRTILE1995__STATICRR -1995 -#define RRTILE1996__STATICRR -1996 -#define RRTILE2004__STATICRR -2004 -#define RRTILE2005__STATICRR -2005 #define POPCORN__STATICRR -2021 -#define RRTILE2022__STATICRR -2022 #define LANEPICS__STATICRR -2023 -#define RRTILE2025__STATICRR -2025 -#define RRTILE2026__STATICRR -2026 -#define RRTILE2027__STATICRR -2027 -#define RRTILE2028__STATICRR -2028 -#define RRTILE2034__STATICRR -2034 -#define RRTILE2050__STATICRR -2050 -#define RRTILE2052__STATICRR -2052 -#define RRTILE2053__STATICRR -2053 -#define RRTILE2056__STATICRR -2056 -#define RRTILE2060__STATICRR -2060 -#define RRTILE2072__STATICRR -2072 -#define RRTILE2074__STATICRR -2074 -#define RRTILE2075__STATICRR -2075 -#define RRTILE2083__STATICRR -2083 -#define RRTILE2097__STATICRR -2097 -#define RRTILE2121__STATICRR -2121 -#define RRTILE2122__STATICRR -2122 -#define RRTILE2123__STATICRR -2123 -#define RRTILE2124__STATICRR -2124 -#define RRTILE2125__STATICRR -2125 -#define RRTILE2126__STATICRR -2126 -#define RRTILE2137__STATICRR -2137 -#define RRTILE2132__STATICRR -2132 -#define RRTILE2136__STATICRR -2136 -#define RRTILE2139__STATICRR -2139 -#define RRTILE2150__STATICRR -2150 -#define RRTILE2151__STATICRR -2151 -#define RRTILE2152__STATICRR -2152 -#define RRTILE2156__STATICRR -2156 -#define RRTILE2157__STATICRR -2157 -#define RRTILE2158__STATICRR -2158 -#define RRTILE2159__STATICRR -2159 -#define RRTILE2160__STATICRR -2160 -#define RRTILE2161__STATICRR -2161 -#define RRTILE2175__STATICRR -2175 -#define RRTILE2176__STATICRR -2176 -#define RRTILE2178__STATICRR -2178 -#define RRTILE2186__STATICRR -2186 -#define RRTILE2214__STATICRR -2214 -#define RRTILE2319__STATICRR -2319 -#define RRTILE2321__STATICRR -2321 -#define RRTILE2326__STATICRR -2326 -#define RRTILE2329__STATICRR -2329 -#define RRTILE2357__STATICRR -2357 -#define RRTILE2382__STATICRR -2382 -#define RRTILE2430__STATICRR -2430 -#define RRTILE2431__STATICRR -2431 -#define RRTILE2432__STATICRR -2432 -#define RRTILE2437__STATICRR -2437 -#define RRTILE2443__STATICRR -2443 -#define RRTILE2445__STATICRR -2445 -#define RRTILE2446__STATICRR -2446 -#define RRTILE2450__STATICRR -2450 -#define RRTILE2451__STATICRR -2451 -#define RRTILE2455__STATICRR -2455 -#define RRTILE2460__STATICRR -2460 -#define RRTILE2465__STATICRR -2465 -#define RRTILE2560__STATICRR -2560 -#define RRTILE2562__STATICRR -2562 -#define RRTILE2564__STATICRR -2564 -#define RRTILE2573__STATICRR -2573 -#define RRTILE2574__STATICRR -2574 -#define RRTILE2577__STATICRR -2577 -#define RRTILE2578__STATICRR -2578 -#define RRTILE2581__STATICRR -2581 -#define RRTILE2583__STATICRR -2583 -#define RRTILE2604__STATICRR -2604 -#define RRTILE2610__STATICRR -2610 -#define RRTILE2613__STATICRR -2613 -#define RRTILE2621__STATICRR -2621 -#define RRTILE2622__STATICRR -2622 -#define RRTILE2636__STATICRR -2636 -#define RRTILE2637__STATICRR -2637 -#define RRTILE2654__STATICRR -2654 -#define RRTILE2656__STATICRR -2656 -#define RRTILE2676__STATICRR -2676 -#define RRTILE2689__STATICRR -2689 -#define RRTILE2697__STATICRR -2697 -#define RRTILE2702__STATICRR -2702 -#define RRTILE2707__STATICRR -2707 -#define RRTILE2732__STATICRR -2732 -#define RRTILE2030__STATICRR -2030 -#define RRTILE2831__STATICRR -2831 -#define RRTILE2832__STATICRR -2832 -#define RRTILE2842__STATICRR -2842 -#define RRTILE2859__STATICRR -2859 -#define RRTILE2876__STATICRR -2876 -#define RRTILE2878__STATICRR -2878 -#define RRTILE2879__STATICRR -2879 -#define RRTILE2893__STATICRR -2893 -#define RRTILE2894__STATICRR -2894 -#define RRTILE2898__STATICRR -2898 -#define RRTILE2899__STATICRR -2899 -#define RRTILE2915__STATICRR -2915 -#define RRTILE2940__STATICRR -2940 -#define RRTILE2944__STATICRR -2944 -#define RRTILE2945__STATICRR -2945 -#define RRTILE2946__STATICRR -2946 -#define RRTILE2947__STATICRR -2947 -#define RRTILE2948__STATICRR -2948 -#define RRTILE2949__STATICRR -2949 -#define RRTILE2961__STATICRR -2961 -#define RRTILE2970__STATICRR -2970 -#define RRTILE2977__STATICRR -2977 -#define RRTILE2978__STATICRR -2978 -#define RRTILE2990__STATICRR -2990 -#define RRTILE3073__STATICRR -3073 -#define RRTILE3083__STATICRR -3083 -#define RRTILE3100__STATICRR -3100 -#define RRTILE3114__STATICRR -3114 -#define RRTILE3115__STATICRR -3115 -#define RRTILE3116__STATICRR -3116 -#define RRTILE3117__STATICRR -3117 -#define RRTILE3120__STATICRR -3120 -#define RRTILE3121__STATICRR -3121 -#define RRTILE3122__STATICRR -3122 -#define RRTILE3123__STATICRR -3123 -#define RRTILE3124__STATICRR -3124 -#define RRTILE3132__STATICRR -3132 -#define RRTILE3139__STATICRR -3139 -#define RRTILE3144__STATICRR -3144 -#define RRTILE3152__STATICRR -3152 -#define RRTILE3153__STATICRR -3153 -#define RRTILE3155__STATICRR -3155 -#define RRTILE3171__STATICRR -3171 -#define RRTILE3172__STATICRR -3172 -#define RRTILE3190__STATICRR -3190 -#define RRTILE3191__STATICRR -3191 -#define RRTILE3192__STATICRR -3192 -#define RRTILE3195__STATICRR -3195 -#define RRTILE3200__STATICRR -3200 -#define RRTILE3201__STATICRR -3201 -#define RRTILE3202__STATICRR -3202 -#define RRTILE3203__STATICRR -3203 -#define RRTILE3204__STATICRR -3204 -#define RRTILE3205__STATICRR -3205 -#define RRTILE3206__STATICRR -3206 -#define RRTILE3207__STATICRR -3207 -#define RRTILE3208__STATICRR -3208 -#define RRTILE3209__STATICRR -3209 -#define RRTILE3216__STATICRR -3216 -#define RRTILE3218__STATICRR -3218 -#define RRTILE3219__STATICRR -3219 -#define RRTILE3232__STATICRR -3232 #define SHOTGUNSHELLS__STATICRR -3372 #define CIRCLESTUCK__STATICRR -3388 -#define RRTILE3410__STATICRR -3410 #define LUMBERBLADE__STATICRR -3411 #define BOWLINGBALLH__STATICRR -3428 #define BOWLINGBALL__STATICRR -3430 #define BOWLINGBALLSPRITE__STATICRR -3437 #define POWDERH__STATICRR -3438 -#define RRTILE3440__STATICRR -3440 -#define RRTILE3462__STATICRR -3462 #define OWHIP__STATICRR -3471 #define UWHIP__STATICRR -3475 #define RPGGUN2__STATICRR -3482 -#define RRTILE3497__STATICRR -3497 -#define RRTILE3498__STATICRR -3498 -#define RRTILE3499__STATICRR -3499 -#define RRTILE3500__STATICRR -3500 #define SLINGBLADE__STATICRR -3510 -#define RRTILE3584__STATICRR -3584 -#define RRTILE3586__STATICRR -3586 -#define RRTILE3587__STATICRR -3587 -#define RRTILE3600__STATICRR -3600 -#define RRTILE3631__STATICRR -3631 -#define RRTILE3635__STATICRR -3635 -#define RRTILE3637__STATICRR -3637 -#define RRTILE3643__STATICRR -3643 -#define RRTILE3647__STATICRR -3647 -#define RRTILE3652__STATICRR -3652 -#define RRTILE3653__STATICRR -3653 -#define RRTILE3668__STATICRR -3668 -#define RRTILE3671__STATICRR -3671 -#define RRTILE3673__STATICRR -3673 -#define RRTILE3677__STATICRR -3677 -#define RRTILE3684__STATICRR -3684 -#define RRTILE3708__STATICRR -3708 -#define RRTILE3714__STATICRR -3714 -#define RRTILE3716__STATICRR -3716 -#define RRTILE3720__STATICRR -3720 -#define RRTILE3723__STATICRR -3723 -#define RRTILE3725__STATICRR -3725 -#define RRTILE3737__STATICRR -3737 -#define RRTILE3754__STATICRR -3754 -#define RRTILE3762__STATICRR -3762 -#define RRTILE3763__STATICRR -3763 -#define RRTILE3764__STATICRR -3764 -#define RRTILE3765__STATICRR -3765 -#define RRTILE3767__STATICRR -3767 -#define RRTILE3773__STATICRR -3773 -#define RRTILE3774__STATICRR -3774 -#define RRTILE3793__STATICRR -3793 -#define RRTILE3795__STATICRR -3795 -#define RRTILE3804__STATICRR -3804 -#define RRTILE3814__STATICRR -3814 -#define RRTILE3815__STATICRR -3815 -#define RRTILE3819__STATICRR -3819 -#define RRTILE3827__STATICRR -3827 -#define RRTILE3837__STATICRR -3837 -#define RRTILE5014__STATICRR -5014 -#define RRTILE5016__STATICRR -5016 -#define RRTILE5017__STATICRR -5017 -#define RRTILE5018__STATICRR -5018 -#define RRTILE5019__STATICRR -5019 -#define RRTILE5020__STATICRR -5020 -#define RRTILE5021__STATICRR -5021 -#define RRTILE5022__STATICRR -5022 -#define RRTILE5023__STATICRR -5023 -#define RRTILE5024__STATICRR -5024 -#define RRTILE5025__STATICRR -5025 -#define RRTILE5026__STATICRR -5026 -#define RRTILE5027__STATICRR -5027 -#define RRTILE5029__STATICRR -5029 -#define RRTILE5030__STATICRR -5030 -#define RRTILE5031__STATICRR -5031 -#define RRTILE5032__STATICRR -5032 -#define RRTILE5033__STATICRR -5033 -#define RRTILE5034__STATICRR -5034 -#define RRTILE5035__STATICRR -5035 -#define RRTILE5036__STATICRR -5036 -#define RRTILE5037__STATICRR -5037 -#define RRTILE5038__STATICRR -5038 -#define RRTILE5039__STATICRR -5039 -#define RRTILE5040__STATICRR -5040 -#define RRTILE5041__STATICRR -5041 -#define RRTILE5043__STATICRR -5043 -#define RRTILE5044__STATICRR -5044 -#define RRTILE5045__STATICRR -5045 -#define RRTILE5046__STATICRR -5046 -#define RRTILE5047__STATICRR -5047 -#define RRTILE5048__STATICRR -5048 -#define RRTILE5049__STATICRR -5049 -#define RRTILE5050__STATICRR -5050 -#define RRTILE5051__STATICRR -5051 -#define RRTILE5052__STATICRR -5052 -#define RRTILE5053__STATICRR -5053 -#define RRTILE5054__STATICRR -5054 -#define RRTILE5055__STATICRR -5055 -#define RRTILE5056__STATICRR -5056 -#define RRTILE5057__STATICRR -5057 -#define RRTILE5058__STATICRR -5058 -#define RRTILE5059__STATICRR -5059 -#define RRTILE5061__STATICRR -5061 -#define RRTILE5062__STATICRR -5062 -#define RRTILE5063__STATICRR -5063 -#define RRTILE5064__STATICRR -5064 -#define RRTILE5065__STATICRR -5065 -#define RRTILE5066__STATICRR -5066 -#define RRTILE5067__STATICRR -5067 -#define RRTILE5068__STATICRR -5068 -#define RRTILE5069__STATICRR -5069 -#define RRTILE5070__STATICRR -5070 -#define RRTILE5071__STATICRR -5071 -#define RRTILE5072__STATICRR -5072 -#define RRTILE5073__STATICRR -5073 -#define RRTILE5074__STATICRR -5074 -#define RRTILE5075__STATICRR -5075 -#define RRTILE5076__STATICRR -5076 -#define RRTILE5077__STATICRR -5077 -#define RRTILE5078__STATICRR -5078 -#define RRTILE5079__STATICRR -5079 -#define RRTILE5080__STATICRR -5080 -#define RRTILE5081__STATICRR -5081 -#define RRTILE5082__STATICRR -5082 -#define RRTILE5083__STATICRR -5083 -#define RRTILE5084__STATICRR -5084 -#define RRTILE5085__STATICRR -5085 -#define RRTILE5086__STATICRR -5086 -#define RRTILE5087__STATICRR -5087 -#define RRTILE5088__STATICRR -5088 -#define RRTILE5090__STATICRR -5090 -#define RRTILE6144__STATICRR -6144 -#define RRTILE7110__STATICRR -7110 -#define RRTILE7111__STATICRR -7111 -#define RRTILE7112__STATICRR -7112 -#define RRTILE7113__STATICRR -7113 #define MOTOGUN__STATICRR -7168 -#define RRTILE7169__STATICRR -7169 #define MOTOHIT__STATICRR -7170 #define BOATHIT__STATICRR -7175 -#define RRTILE7184__STATICRR -7184 -#define RRTILE7190__STATICRR -7190 -#define RRTILE7191__STATICRR -7191 -#define RRTILE7213__STATICRR -7213 -#define RRTILE7219__STATICRR -7219 #define EMPTYBIKE__STATICRR -7220 #define EMPTYBOAT__STATICRR -7233 -#define RRTILE7424__STATICRR -7424 -#define RRTILE7430__STATICRR -7430 -#define RRTILE7433__STATICRR -7433 -#define RRTILE7441__STATICRR -7441 -#define RRTILE7547__STATICRR -7547 -#define RRTILE7467__STATICRR -7467 -#define RRTILE7469__STATICRR -7469 -#define RRTILE7470__STATICRR -7470 -#define RRTILE7475__STATICRR -7475 -#define RRTILE7478__STATICRR -7478 -#define RRTILE7505__STATICRR -7505 -#define RRTILE7506__STATICRR -7506 -#define RRTILE7534__STATICRR -7534 -#define RRTILE7540__STATICRR -7540 -#define RRTILE7533__STATICRR -7533 -#define RRTILE7545__STATICRR -7545 -#define RRTILE7552__STATICRR -7552 -#define RRTILE7553__STATICRR -7553 -#define RRTILE7554__STATICRR -7554 -#define RRTILE7555__STATICRR -7555 -#define RRTILE7557__STATICRR -7557 -#define RRTILE7558__STATICRR -7558 -#define RRTILE7559__STATICRR -7559 -#define RRTILE7561__STATICRR -7561 -#define RRTILE7566__STATICRR -7566 -#define RRTILE7568__STATICRR -7568 -#define RRTILE7574__STATICRR -7574 -#define RRTILE7575__STATICRR -7575 -#define RRTILE7576__STATICRR -7576 -#define RRTILE7578__STATICRR -7578 -#define RRTILE7579__STATICRR -7579 -#define RRTILE7580__STATICRR -7580 -#define RRTILE7595__STATICRR -7595 -#define RRTILE7629__STATICRR -7629 -#define RRTILE7636__STATICRR -7636 -#define RRTILE7638__STATICRR -7638 -#define RRTILE7640__STATICRR -7640 -#define RRTILE7644__STATICRR -7644 -#define RRTILE7646__STATICRR -7646 -#define RRTILE7648__STATICRR -7648 -#define RRTILE7650__STATICRR -7650 -#define RRTILE7653__STATICRR -7653 -#define RRTILE7655__STATICRR -7655 -#define RRTILE7657__STATICRR -7657 -#define RRTILE7659__STATICRR -7659 -#define RRTILE7691__STATICRR -7691 -#define RRTILE7694__STATICRR -7694 -#define RRTILE7696__STATICRR -7696 -#define RRTILE7697__STATICRR -7697 -#define RRTILE7700__STATICRR -7700 -#define RRTILE7702__STATICRR -7702 -#define RRTILE7704__STATICRR -7704 -#define RRTILE7705__STATICRR -7705 -#define RRTILE7711__STATICRR -7711 -#define RRTILE7716__STATICRR -7716 -#define RRTILE7756__STATICRR -7756 -#define RRTILE7768__STATICRR -7768 -#define RRTILE7806__STATICRR -7806 -#define RRTILE7820__STATICRR -7820 -#define RRTILE7859__STATICRR -7859 -#define RRTILE7870__STATICRR -7870 -#define RRTILE7873__STATICRR -7873 -#define RRTILE7875__STATICRR -7875 -#define RRTILE7876__STATICRR -7876 -#define RRTILE7879__STATICRR -7879 -#define RRTILE7881__STATICRR -7881 -#define RRTILE7883__STATICRR -7883 -#define RRTILE7885__STATICRR -7885 -#define RRTILE7886__STATICRR -7886 -#define RRTILE7887__STATICRR -7887 -#define RRTILE7888__STATICRR -7888 -#define RRTILE7889__STATICRR -7889 -#define RRTILE7890__STATICRR -7890 -#define RRTILE7900__STATICRR -7900 -#define RRTILE7901__STATICRR -7901 -#define RRTILE7906__STATICRR -7906 -#define RRTILE7912__STATICRR -7912 -#define RRTILE7913__STATICRR -7913 -#define RRTILE7936__STATICRR -7936 -#define RRTILE8047__STATICRR -8047 #define MULTISWITCH2__STATICRR -8048 -#define RRTILE8059__STATICRR -8059 -#define RRTILE8060__STATICRR -8060 -#define RRTILE8063__STATICRR -8063 -#define RRTILE8067__STATICRR -8067 -#define RRTILE8076__STATICRR -8076 -#define RRTILE8094__STATICRR -8094 -#define RRTILE8096__STATICRR -8096 -#define RRTILE8099__STATICRR -8099 -#define RRTILE8106__STATICRR -8106 -#define RRTILE8162__STATICRR -8162 -#define RRTILE8163__STATICRR -8163 -#define RRTILE8164__STATICRR -8164 -#define RRTILE8165__STATICRR -8165 -#define RRTILE8166__STATICRR -8166 -#define RRTILE8167__STATICRR -8167 -#define RRTILE8168__STATICRR -8168 -#define RRTILE8192__STATICRR -8192 -#define RRTILE8193__STATICRR -8193 -#define RRTILE8215__STATICRR -8215 -#define RRTILE8216__STATICRR -8216 -#define RRTILE8217__STATICRR -8217 -#define RRTILE8218__STATICRR -8218 -#define RRTILE8220__STATICRR -8220 -#define RRTILE8221__STATICRR -8221 -#define RRTILE8222__STATICRR -8222 -#define RRTILE8223__STATICRR -8223 -#define RRTILE8224__STATICRR -8224 -#define RRTILE8227__STATICRR -8227 -#define RRTILE8312__STATICRR -8312 -#define RRTILE8370__STATICRR -8370 -#define RRTILE8371__STATICRR -8371 -#define RRTILE8372__STATICRR -8372 -#define RRTILE8373__STATICRR -8373 -#define RRTILE8379__STATICRR -8379 -#define RRTILE8380__STATICRR -8380 -#define RRTILE8385__STATICRR -8385 -#define RRTILE8386__STATICRR -8386 -#define RRTILE8387__STATICRR -8387 -#define RRTILE8388__STATICRR -8388 -#define RRTILE8389__STATICRR -8389 -#define RRTILE8390__STATICRR -8390 -#define RRTILE8391__STATICRR -8391 -#define RRTILE8392__STATICRR -8392 -#define RRTILE8394__STATICRR -8394 -#define RRTILE8395__STATICRR -8395 -#define RRTILE8396__STATICRR -8396 -#define RRTILE8397__STATICRR -8397 -#define RRTILE8398__STATICRR -8398 -#define RRTILE8399__STATICRR -8399 -#define RRTILE8423__STATICRR -8423 -#define RRTILE8448__STATICRR -8448 -#define RRTILE8450__STATICRR -8450 #define BOATAMMO__STATICRR -8460 -#define RRTILE8461__STATICRR -8461 -#define RRTILE8462__STATICRR -8462 -#define RRTILE8464__STATICRR -8464 -#define RRTILE8475__STATICRR -8475 -#define RRTILE8487__STATICRR -8487 -#define RRTILE8488__STATICRR -8488 -#define RRTILE8489__STATICRR -8489 -#define RRTILE8490__STATICRR -8490 -#define RRTILE8496__STATICRR -8496 -#define RRTILE8497__STATICRR -8497 -#define RRTILE8498__STATICRR -8498 -#define RRTILE8499__STATICRR -8499 -#define RRTILE8503__STATICRR -8503 -#define RRTILE8525__STATICRR -8525 -#define RRTILE8537__STATICRR -8537 -#define RRTILE8565__STATICRR -8565 -#define RRTILE8567__STATICRR -8567 -#define RRTILE8568__STATICRR -8568 -#define RRTILE8569__STATICRR -8569 -#define RRTILE8570__STATICRR -8570 -#define RRTILE8571__STATICRR -8571 -#define RRTILE8579__STATICRR -8579 -#define RRTILE8588__STATICRR -8588 -#define RRTILE8589__STATICRR -8589 -#define RRTILE8590__STATICRR -8590 -#define RRTILE8591__STATICRR -8591 -#define RRTILE8592__STATICRR -8592 -#define RRTILE8593__STATICRR -8593 -#define RRTILE8594__STATICRR -8594 -#define RRTILE8595__STATICRR -8595 -#define RRTILE8596__STATICRR -8596 -#define RRTILE8598__STATICRR -8598 -#define RRTILE8605__STATICRR -8605 -#define RRTILE8608__STATICRR -8608 -#define RRTILE8609__STATICRR -8609 -#define RRTILE8611__STATICRR -8611 -#define RRTILE8617__STATICRR -8617 -#define RRTILE8618__STATICRR -8618 -#define RRTILE8620__STATICRR -8620 -#define RRTILE8621__STATICRR -8621 -#define RRTILE8622__STATICRR -8622 -#define RRTILE8623__STATICRR -8623 -#define RRTILE8624__STATICRR -8624 -#define RRTILE8640__STATICRR -8640 -#define RRTILE8651__STATICRR -8651 -#define RRTILE8660__STATICRR -8660 -#define RRTILE8677__STATICRR -8677 -#define RRTILE8679__STATICRR -8679 -#define RRTILE8680__STATICRR -8680 -#define RRTILE8681__STATICRR -8681 -#define RRTILE8682__STATICRR -8682 -#define RRTILE8683__STATICRR -8683 -#define RRTILE8704__STATICRR -8704 #define BOULDER__STATICRR -256 #define BOULDER1__STATICRR -264 #define TORNADO__STATICRR -1930 @@ -2853,574 +2322,45 @@ extern int32_t TILE_DUKETAG; extern int32_t TILE_SIGN1; extern int32_t TILE_SIGN2; extern int32_t TILE_JURYGUY; -extern int32_t TILE_RRTILE11; extern int32_t TILE_RPG2SPRITE; -extern int32_t TILE_RRTILE18; -extern int32_t TILE_RRTILE19; -extern int32_t TILE_RRTILE34; -extern int32_t TILE_RRTILE35; extern int32_t TILE_DESTRUCTO; -extern int32_t TILE_RRTILE38; extern int32_t TILE_RRTILE43; extern int32_t TILE_GUTMETER; -extern int32_t TILE_RRTILE63; -extern int32_t TILE_RRTILE64; -extern int32_t TILE_RRTILE65; -extern int32_t TILE_RRTILE66; -extern int32_t TILE_RRTILE67; -extern int32_t TILE_RRTILE68; extern int32_t TILE_SOUNDFX; extern int32_t TILE_MOTOAMMO; extern int32_t TILE_UFOBEAM; -extern int32_t TILE_RRTILE280; -extern int32_t TILE_RRTILE281; -extern int32_t TILE_RRTILE282; -extern int32_t TILE_RRTILE283; -extern int32_t TILE_RRTILE285; -extern int32_t TILE_RRTILE286; -extern int32_t TILE_RRTILE287; -extern int32_t TILE_RRTILE288; -extern int32_t TILE_RRTILE289; -extern int32_t TILE_RRTILE290; -extern int32_t TILE_RRTILE291; -extern int32_t TILE_RRTILE292; -extern int32_t TILE_RRTILE293; -extern int32_t TILE_RRTILE295; -extern int32_t TILE_RRTILE296; -extern int32_t TILE_RRTILE297; extern int32_t TILE_CDPLAYER; -extern int32_t TILE_RRTILE380; -extern int32_t TILE_RRTILE403; -extern int32_t TILE_RRTILE409; extern int32_t TILE_GUTMETER_LIGHT1; extern int32_t TILE_GUTMETER_LIGHT2; extern int32_t TILE_GUTMETER_LIGHT3; extern int32_t TILE_GUTMETER_LIGHT4; extern int32_t TILE_AMMO_ICON; -extern int32_t TILE_RRTILE1076; extern int32_t TILE_MUD; extern int32_t TILE_EXPLOSION3; -extern int32_t TILE_RRTILE1636; extern int32_t TILE_WEAPONBAR; extern int32_t TILE_RRTILE1752; extern int32_t TILE_RPG2; -extern int32_t TILE_RRTILE1790; -extern int32_t TILE_RRTILE1792; -extern int32_t TILE_RRTILE1801; -extern int32_t TILE_RRTILE1805; -extern int32_t TILE_RRTILE1807; -extern int32_t TILE_RRTILE1808; -extern int32_t TILE_RRTILE1812; -extern int32_t TILE_RRTILE1814; -extern int32_t TILE_RRTILE1817; -extern int32_t TILE_RRTILE1821; -extern int32_t TILE_RRTILE1824; -extern int32_t TILE_RRTILE1826; -extern int32_t TILE_RRTILE1850; -extern int32_t TILE_RRTILE1851; -extern int32_t TILE_RRTILE1856; -extern int32_t TILE_RRTILE1877; -extern int32_t TILE_RRTILE1878; -extern int32_t TILE_RRTILE1938; -extern int32_t TILE_RRTILE1939; -extern int32_t TILE_RRTILE1942; -extern int32_t TILE_RRTILE1944; -extern int32_t TILE_RRTILE1945; -extern int32_t TILE_RRTILE1947; -extern int32_t TILE_RRTILE1951; -extern int32_t TILE_RRTILE1952; -extern int32_t TILE_RRTILE1953; -extern int32_t TILE_RRTILE1961; -extern int32_t TILE_RRTILE1964; -extern int32_t TILE_RRTILE1973; -extern int32_t TILE_RRTILE1985; -extern int32_t TILE_RRTILE1986; -extern int32_t TILE_RRTILE1987; -extern int32_t TILE_RRTILE1988; -extern int32_t TILE_RRTILE1990; -extern int32_t TILE_RRTILE1995; -extern int32_t TILE_RRTILE1996; -extern int32_t TILE_RRTILE2004; -extern int32_t TILE_RRTILE2005; extern int32_t TILE_POPCORN; -extern int32_t TILE_RRTILE2022; extern int32_t TILE_LANEPICS; -extern int32_t TILE_RRTILE2025; -extern int32_t TILE_RRTILE2026; -extern int32_t TILE_RRTILE2027; -extern int32_t TILE_RRTILE2028; -extern int32_t TILE_RRTILE2034; -extern int32_t TILE_RRTILE2050; -extern int32_t TILE_RRTILE2052; -extern int32_t TILE_RRTILE2053; -extern int32_t TILE_RRTILE2056; -extern int32_t TILE_RRTILE2060; -extern int32_t TILE_RRTILE2072; -extern int32_t TILE_RRTILE2074; -extern int32_t TILE_RRTILE2075; -extern int32_t TILE_RRTILE2083; -extern int32_t TILE_RRTILE2097; -extern int32_t TILE_RRTILE2121; -extern int32_t TILE_RRTILE2122; -extern int32_t TILE_RRTILE2123; -extern int32_t TILE_RRTILE2124; -extern int32_t TILE_RRTILE2125; -extern int32_t TILE_RRTILE2126; -extern int32_t TILE_RRTILE2137; -extern int32_t TILE_RRTILE2132; -extern int32_t TILE_RRTILE2136; -extern int32_t TILE_RRTILE2139; -extern int32_t TILE_RRTILE2150; -extern int32_t TILE_RRTILE2151; -extern int32_t TILE_RRTILE2152; -extern int32_t TILE_RRTILE2156; -extern int32_t TILE_RRTILE2157; -extern int32_t TILE_RRTILE2158; -extern int32_t TILE_RRTILE2159; -extern int32_t TILE_RRTILE2160; -extern int32_t TILE_RRTILE2161; -extern int32_t TILE_RRTILE2175; -extern int32_t TILE_RRTILE2176; -extern int32_t TILE_RRTILE2178; -extern int32_t TILE_RRTILE2186; -extern int32_t TILE_RRTILE2214; -extern int32_t TILE_RRTILE2319; -extern int32_t TILE_RRTILE2321; -extern int32_t TILE_RRTILE2326; -extern int32_t TILE_RRTILE2329; -extern int32_t TILE_RRTILE2357; -extern int32_t TILE_RRTILE2382; -extern int32_t TILE_RRTILE2430; -extern int32_t TILE_RRTILE2431; -extern int32_t TILE_RRTILE2432; -extern int32_t TILE_RRTILE2437; -extern int32_t TILE_RRTILE2443; -extern int32_t TILE_RRTILE2445; -extern int32_t TILE_RRTILE2446; -extern int32_t TILE_RRTILE2450; -extern int32_t TILE_RRTILE2451; -extern int32_t TILE_RRTILE2455; -extern int32_t TILE_RRTILE2460; -extern int32_t TILE_RRTILE2465; -extern int32_t TILE_RRTILE2560; -extern int32_t TILE_RRTILE2562; -extern int32_t TILE_RRTILE2564; -extern int32_t TILE_RRTILE2573; -extern int32_t TILE_RRTILE2574; -extern int32_t TILE_RRTILE2577; -extern int32_t TILE_RRTILE2578; -extern int32_t TILE_RRTILE2581; -extern int32_t TILE_RRTILE2583; -extern int32_t TILE_RRTILE2604; -extern int32_t TILE_RRTILE2610; -extern int32_t TILE_RRTILE2613; -extern int32_t TILE_RRTILE2621; -extern int32_t TILE_RRTILE2622; -extern int32_t TILE_RRTILE2636; -extern int32_t TILE_RRTILE2637; -extern int32_t TILE_RRTILE2654; -extern int32_t TILE_RRTILE2656; -extern int32_t TILE_RRTILE2676; -extern int32_t TILE_RRTILE2689; -extern int32_t TILE_RRTILE2697; -extern int32_t TILE_RRTILE2702; -extern int32_t TILE_RRTILE2707; -extern int32_t TILE_RRTILE2732; -extern int32_t TILE_RRTILE2030; -extern int32_t TILE_RRTILE2831; -extern int32_t TILE_RRTILE2832; -extern int32_t TILE_RRTILE2842; -extern int32_t TILE_RRTILE2859; -extern int32_t TILE_RRTILE2876; -extern int32_t TILE_RRTILE2878; -extern int32_t TILE_RRTILE2879; -extern int32_t TILE_RRTILE2893; -extern int32_t TILE_RRTILE2894; -extern int32_t TILE_RRTILE2898; -extern int32_t TILE_RRTILE2899; -extern int32_t TILE_RRTILE2915; -extern int32_t TILE_RRTILE2940; -extern int32_t TILE_RRTILE2944; -extern int32_t TILE_RRTILE2945; -extern int32_t TILE_RRTILE2946; -extern int32_t TILE_RRTILE2947; -extern int32_t TILE_RRTILE2948; -extern int32_t TILE_RRTILE2949; -extern int32_t TILE_RRTILE2961; -extern int32_t TILE_RRTILE2970; -extern int32_t TILE_RRTILE2977; -extern int32_t TILE_RRTILE2978; -extern int32_t TILE_RRTILE2990; -extern int32_t TILE_RRTILE3073; -extern int32_t TILE_RRTILE3083; -extern int32_t TILE_RRTILE3100; -extern int32_t TILE_RRTILE3114; -extern int32_t TILE_RRTILE3115; -extern int32_t TILE_RRTILE3116; -extern int32_t TILE_RRTILE3117; -extern int32_t TILE_RRTILE3120; -extern int32_t TILE_RRTILE3121; -extern int32_t TILE_RRTILE3122; -extern int32_t TILE_RRTILE3123; -extern int32_t TILE_RRTILE3124; -extern int32_t TILE_RRTILE3132; -extern int32_t TILE_RRTILE3139; -extern int32_t TILE_RRTILE3144; -extern int32_t TILE_RRTILE3152; -extern int32_t TILE_RRTILE3153; -extern int32_t TILE_RRTILE3155; -extern int32_t TILE_RRTILE3171; -extern int32_t TILE_RRTILE3172; -extern int32_t TILE_RRTILE3190; -extern int32_t TILE_RRTILE3191; -extern int32_t TILE_RRTILE3192; -extern int32_t TILE_RRTILE3195; -extern int32_t TILE_RRTILE3200; -extern int32_t TILE_RRTILE3201; -extern int32_t TILE_RRTILE3202; -extern int32_t TILE_RRTILE3203; -extern int32_t TILE_RRTILE3204; -extern int32_t TILE_RRTILE3205; -extern int32_t TILE_RRTILE3206; -extern int32_t TILE_RRTILE3207; -extern int32_t TILE_RRTILE3208; -extern int32_t TILE_RRTILE3209; -extern int32_t TILE_RRTILE3216; -extern int32_t TILE_RRTILE3218; -extern int32_t TILE_RRTILE3219; -extern int32_t TILE_RRTILE3232; extern int32_t TILE_SHOTGUNSHELLS; extern int32_t TILE_CIRCLESTUCK; -extern int32_t TILE_RRTILE3410; extern int32_t TILE_LUMBERBLADE; extern int32_t TILE_BOWLINGBALLH; extern int32_t TILE_BOWLINGBALL; extern int32_t TILE_BOWLINGBALLSPRITE; extern int32_t TILE_POWDERH; -extern int32_t TILE_RRTILE3440; -extern int32_t TILE_RRTILE3462; extern int32_t TILE_OWHIP; extern int32_t TILE_UWHIP; extern int32_t TILE_RPGGUN2; -extern int32_t TILE_RRTILE3497; -extern int32_t TILE_RRTILE3498; -extern int32_t TILE_RRTILE3499; -extern int32_t TILE_RRTILE3500; extern int32_t TILE_SLINGBLADE; -extern int32_t TILE_RRTILE3584; -extern int32_t TILE_RRTILE3586; -extern int32_t TILE_RRTILE3587; -extern int32_t TILE_RRTILE3600; -extern int32_t TILE_RRTILE3631; -extern int32_t TILE_RRTILE3635; -extern int32_t TILE_RRTILE3637; -extern int32_t TILE_RRTILE3643; -extern int32_t TILE_RRTILE3647; -extern int32_t TILE_RRTILE3652; -extern int32_t TILE_RRTILE3653; -extern int32_t TILE_RRTILE3668; -extern int32_t TILE_RRTILE3671; -extern int32_t TILE_RRTILE3673; -extern int32_t TILE_RRTILE3677; -extern int32_t TILE_RRTILE3684; -extern int32_t TILE_RRTILE3708; -extern int32_t TILE_RRTILE3714; -extern int32_t TILE_RRTILE3716; -extern int32_t TILE_RRTILE3720; -extern int32_t TILE_RRTILE3723; -extern int32_t TILE_RRTILE3725; -extern int32_t TILE_RRTILE3737; -extern int32_t TILE_RRTILE3754; -extern int32_t TILE_RRTILE3762; -extern int32_t TILE_RRTILE3763; -extern int32_t TILE_RRTILE3764; -extern int32_t TILE_RRTILE3765; -extern int32_t TILE_RRTILE3767; -extern int32_t TILE_RRTILE3773; -extern int32_t TILE_RRTILE3774; -extern int32_t TILE_RRTILE3793; -extern int32_t TILE_RRTILE3795; -extern int32_t TILE_RRTILE3804; -extern int32_t TILE_RRTILE3814; -extern int32_t TILE_RRTILE3815; -extern int32_t TILE_RRTILE3819; -extern int32_t TILE_RRTILE3827; -extern int32_t TILE_RRTILE3837; -extern int32_t TILE_RRTILE5014; -extern int32_t TILE_RRTILE5016; -extern int32_t TILE_RRTILE5017; -extern int32_t TILE_RRTILE5018; -extern int32_t TILE_RRTILE5019; -extern int32_t TILE_RRTILE5020; -extern int32_t TILE_RRTILE5021; -extern int32_t TILE_RRTILE5022; -extern int32_t TILE_RRTILE5023; -extern int32_t TILE_RRTILE5024; -extern int32_t TILE_RRTILE5025; -extern int32_t TILE_RRTILE5026; -extern int32_t TILE_RRTILE5027; -extern int32_t TILE_RRTILE5029; -extern int32_t TILE_RRTILE5030; -extern int32_t TILE_RRTILE5031; -extern int32_t TILE_RRTILE5032; -extern int32_t TILE_RRTILE5033; -extern int32_t TILE_RRTILE5034; -extern int32_t TILE_RRTILE5035; -extern int32_t TILE_RRTILE5036; -extern int32_t TILE_RRTILE5037; -extern int32_t TILE_RRTILE5038; -extern int32_t TILE_RRTILE5039; -extern int32_t TILE_RRTILE5040; -extern int32_t TILE_RRTILE5041; -extern int32_t TILE_RRTILE5043; -extern int32_t TILE_RRTILE5044; -extern int32_t TILE_RRTILE5045; -extern int32_t TILE_RRTILE5046; -extern int32_t TILE_RRTILE5047; -extern int32_t TILE_RRTILE5048; -extern int32_t TILE_RRTILE5049; -extern int32_t TILE_RRTILE5050; -extern int32_t TILE_RRTILE5051; -extern int32_t TILE_RRTILE5052; -extern int32_t TILE_RRTILE5053; -extern int32_t TILE_RRTILE5054; -extern int32_t TILE_RRTILE5055; -extern int32_t TILE_RRTILE5056; -extern int32_t TILE_RRTILE5057; -extern int32_t TILE_RRTILE5058; -extern int32_t TILE_RRTILE5059; -extern int32_t TILE_RRTILE5061; -extern int32_t TILE_RRTILE5062; -extern int32_t TILE_RRTILE5063; -extern int32_t TILE_RRTILE5064; -extern int32_t TILE_RRTILE5065; -extern int32_t TILE_RRTILE5066; -extern int32_t TILE_RRTILE5067; -extern int32_t TILE_RRTILE5068; -extern int32_t TILE_RRTILE5069; -extern int32_t TILE_RRTILE5070; -extern int32_t TILE_RRTILE5071; -extern int32_t TILE_RRTILE5072; -extern int32_t TILE_RRTILE5073; -extern int32_t TILE_RRTILE5074; -extern int32_t TILE_RRTILE5075; -extern int32_t TILE_RRTILE5076; -extern int32_t TILE_RRTILE5077; -extern int32_t TILE_RRTILE5078; -extern int32_t TILE_RRTILE5079; -extern int32_t TILE_RRTILE5080; -extern int32_t TILE_RRTILE5081; -extern int32_t TILE_RRTILE5082; -extern int32_t TILE_RRTILE5083; -extern int32_t TILE_RRTILE5084; -extern int32_t TILE_RRTILE5085; -extern int32_t TILE_RRTILE5086; -extern int32_t TILE_RRTILE5087; -extern int32_t TILE_RRTILE5088; -extern int32_t TILE_RRTILE5090; -extern int32_t TILE_RRTILE6144; -extern int32_t TILE_RRTILE7110; -extern int32_t TILE_RRTILE7111; -extern int32_t TILE_RRTILE7112; -extern int32_t TILE_RRTILE7113; extern int32_t TILE_MOTOGUN; -extern int32_t TILE_RRTILE7169; extern int32_t TILE_MOTOHIT; extern int32_t TILE_BOATHIT; -extern int32_t TILE_RRTILE7184; -extern int32_t TILE_RRTILE7190; -extern int32_t TILE_RRTILE7191; -extern int32_t TILE_RRTILE7213; -extern int32_t TILE_RRTILE7219; extern int32_t TILE_EMPTYBIKE; extern int32_t TILE_EMPTYBOAT; -extern int32_t TILE_RRTILE7424; -extern int32_t TILE_RRTILE7430; -extern int32_t TILE_RRTILE7433; -extern int32_t TILE_RRTILE7441; -extern int32_t TILE_RRTILE7547; -extern int32_t TILE_RRTILE7467; -extern int32_t TILE_RRTILE7469; -extern int32_t TILE_RRTILE7470; -extern int32_t TILE_RRTILE7475; -extern int32_t TILE_RRTILE7478; -extern int32_t TILE_RRTILE7505; -extern int32_t TILE_RRTILE7506; -extern int32_t TILE_RRTILE7534; -extern int32_t TILE_RRTILE7540; -extern int32_t TILE_RRTILE7533; -extern int32_t TILE_RRTILE7545; -extern int32_t TILE_RRTILE7552; -extern int32_t TILE_RRTILE7553; -extern int32_t TILE_RRTILE7554; -extern int32_t TILE_RRTILE7555; -extern int32_t TILE_RRTILE7557; -extern int32_t TILE_RRTILE7558; -extern int32_t TILE_RRTILE7559; -extern int32_t TILE_RRTILE7561; -extern int32_t TILE_RRTILE7566; -extern int32_t TILE_RRTILE7568; -extern int32_t TILE_RRTILE7574; -extern int32_t TILE_RRTILE7575; -extern int32_t TILE_RRTILE7576; -extern int32_t TILE_RRTILE7578; -extern int32_t TILE_RRTILE7579; -extern int32_t TILE_RRTILE7580; -extern int32_t TILE_RRTILE7595; extern int32_t TILE_RRTILE7629; -extern int32_t TILE_RRTILE7636; -extern int32_t TILE_RRTILE7638; -extern int32_t TILE_RRTILE7640; -extern int32_t TILE_RRTILE7644; -extern int32_t TILE_RRTILE7646; -extern int32_t TILE_RRTILE7648; -extern int32_t TILE_RRTILE7650; -extern int32_t TILE_RRTILE7653; -extern int32_t TILE_RRTILE7655; -extern int32_t TILE_RRTILE7657; -extern int32_t TILE_RRTILE7659; -extern int32_t TILE_RRTILE7691; -extern int32_t TILE_RRTILE7694; -extern int32_t TILE_RRTILE7696; -extern int32_t TILE_RRTILE7697; -extern int32_t TILE_RRTILE7700; -extern int32_t TILE_RRTILE7702; -extern int32_t TILE_RRTILE7704; -extern int32_t TILE_RRTILE7705; -extern int32_t TILE_RRTILE7711; -extern int32_t TILE_RRTILE7716; -extern int32_t TILE_RRTILE7756; -extern int32_t TILE_RRTILE7768; -extern int32_t TILE_RRTILE7806; -extern int32_t TILE_RRTILE7820; -extern int32_t TILE_RRTILE7870; -extern int32_t TILE_RRTILE7873; -extern int32_t TILE_RRTILE7859; -extern int32_t TILE_RRTILE7875; -extern int32_t TILE_RRTILE7876; -extern int32_t TILE_RRTILE7879; -extern int32_t TILE_RRTILE7881; -extern int32_t TILE_RRTILE7883; -extern int32_t TILE_RRTILE7885; -extern int32_t TILE_RRTILE7886; -extern int32_t TILE_RRTILE7887; -extern int32_t TILE_RRTILE7888; -extern int32_t TILE_RRTILE7889; -extern int32_t TILE_RRTILE7890; -extern int32_t TILE_RRTILE7900; -extern int32_t TILE_RRTILE7901; -extern int32_t TILE_RRTILE7906; -extern int32_t TILE_RRTILE7912; -extern int32_t TILE_RRTILE7913; -extern int32_t TILE_RRTILE7936; -extern int32_t TILE_RRTILE8047; extern int32_t TILE_MULTISWITCH2; -extern int32_t TILE_RRTILE8059; -extern int32_t TILE_RRTILE8060; -extern int32_t TILE_RRTILE8063; -extern int32_t TILE_RRTILE8067; -extern int32_t TILE_RRTILE8076; -extern int32_t TILE_RRTILE8094; -extern int32_t TILE_RRTILE8096; -extern int32_t TILE_RRTILE8099; -extern int32_t TILE_RRTILE8106; -extern int32_t TILE_RRTILE8162; -extern int32_t TILE_RRTILE8163; -extern int32_t TILE_RRTILE8164; -extern int32_t TILE_RRTILE8165; -extern int32_t TILE_RRTILE8166; -extern int32_t TILE_RRTILE8167; -extern int32_t TILE_RRTILE8168; -extern int32_t TILE_RRTILE8192; -extern int32_t TILE_RRTILE8193; -extern int32_t TILE_RRTILE8215; -extern int32_t TILE_RRTILE8216; -extern int32_t TILE_RRTILE8217; -extern int32_t TILE_RRTILE8218; -extern int32_t TILE_RRTILE8220; -extern int32_t TILE_RRTILE8221; -extern int32_t TILE_RRTILE8222; -extern int32_t TILE_RRTILE8223; -extern int32_t TILE_RRTILE8224; -extern int32_t TILE_RRTILE8227; -extern int32_t TILE_RRTILE8312; -extern int32_t TILE_RRTILE8370; -extern int32_t TILE_RRTILE8371; -extern int32_t TILE_RRTILE8372; -extern int32_t TILE_RRTILE8373; -extern int32_t TILE_RRTILE8379; -extern int32_t TILE_RRTILE8380; -extern int32_t TILE_RRTILE8385; -extern int32_t TILE_RRTILE8386; -extern int32_t TILE_RRTILE8387; -extern int32_t TILE_RRTILE8388; -extern int32_t TILE_RRTILE8389; -extern int32_t TILE_RRTILE8390; -extern int32_t TILE_RRTILE8391; -extern int32_t TILE_RRTILE8392; -extern int32_t TILE_RRTILE8394; -extern int32_t TILE_RRTILE8395; -extern int32_t TILE_RRTILE8396; -extern int32_t TILE_RRTILE8397; -extern int32_t TILE_RRTILE8398; -extern int32_t TILE_RRTILE8399; -extern int32_t TILE_RRTILE8423; -extern int32_t TILE_RRTILE8448; -extern int32_t TILE_RRTILE8450; extern int32_t TILE_BOATAMMO; -extern int32_t TILE_RRTILE8461; -extern int32_t TILE_RRTILE8462; -extern int32_t TILE_RRTILE8464; -extern int32_t TILE_RRTILE8475; -extern int32_t TILE_RRTILE8487; -extern int32_t TILE_RRTILE8488; -extern int32_t TILE_RRTILE8489; -extern int32_t TILE_RRTILE8490; -extern int32_t TILE_RRTILE8496; -extern int32_t TILE_RRTILE8497; -extern int32_t TILE_RRTILE8498; -extern int32_t TILE_RRTILE8499; -extern int32_t TILE_RRTILE8503; -extern int32_t TILE_RRTILE8525; -extern int32_t TILE_RRTILE8537; -extern int32_t TILE_RRTILE8565; -extern int32_t TILE_RRTILE8567; -extern int32_t TILE_RRTILE8568; -extern int32_t TILE_RRTILE8569; -extern int32_t TILE_RRTILE8570; -extern int32_t TILE_RRTILE8571; -extern int32_t TILE_RRTILE8579; -extern int32_t TILE_RRTILE8588; -extern int32_t TILE_RRTILE8589; -extern int32_t TILE_RRTILE8590; -extern int32_t TILE_RRTILE8591; -extern int32_t TILE_RRTILE8592; -extern int32_t TILE_RRTILE8593; -extern int32_t TILE_RRTILE8594; -extern int32_t TILE_RRTILE8595; -extern int32_t TILE_RRTILE8596; -extern int32_t TILE_RRTILE8598; -extern int32_t TILE_RRTILE8605; -extern int32_t TILE_RRTILE8608; -extern int32_t TILE_RRTILE8609; -extern int32_t TILE_RRTILE8611; -extern int32_t TILE_RRTILE8617; -extern int32_t TILE_RRTILE8618; -extern int32_t TILE_RRTILE8620; -extern int32_t TILE_RRTILE8621; -extern int32_t TILE_RRTILE8622; -extern int32_t TILE_RRTILE8623; -extern int32_t TILE_RRTILE8624; -extern int32_t TILE_RRTILE8640; -extern int32_t TILE_RRTILE8651; -extern int32_t TILE_RRTILE8660; -extern int32_t TILE_RRTILE8677; -extern int32_t TILE_RRTILE8679; -extern int32_t TILE_RRTILE8680; -extern int32_t TILE_RRTILE8681; -extern int32_t TILE_RRTILE8682; -extern int32_t TILE_RRTILE8683; -extern int32_t TILE_RRTILE8704; extern int32_t TILE_BOULDER; extern int32_t TILE_BOULDER1; extern int32_t TILE_TORNADO; diff --git a/source/games/duke/src/zz_namesdyn.cpp b/source/games/duke/src/zz_namesdyn.cpp index 2e92d7046..ba8340b3f 100644 --- a/source/games/duke/src/zz_namesdyn.cpp +++ b/source/games/duke/src/zz_namesdyn.cpp @@ -768,574 +768,42 @@ static struct dynitem g_dynTileList[] = { "SIGN1", DVPTR(TILE_SIGN1), SIGN1__STATIC, SIGN1__STATICRR }, { "SIGN2", DVPTR(TILE_SIGN2), SIGN2__STATIC, SIGN2__STATICRR }, { "JURYGUY", DVPTR(TILE_JURYGUY), JURYGUY__STATIC, JURYGUY__STATICRR }, - { "RRTILE11", DVPTR(TILE_RRTILE11), 0, RRTILE11__STATICRR }, { "RPG2SPRITE", DVPTR(TILE_RPG2SPRITE), 0, RPG2SPRITE__STATICRR }, - { "RRTILE18", DVPTR(TILE_RRTILE18), 0, RRTILE18__STATICRR }, - { "RRTILE19", DVPTR(TILE_RRTILE19), 0, RRTILE19__STATICRR }, - { "RRTILE34", DVPTR(TILE_RRTILE34), 0, RRTILE34__STATICRR }, - { "RRTILE35", DVPTR(TILE_RRTILE35), 0, RRTILE35__STATICRR }, { "DESTRUCTO", DVPTR(TILE_DESTRUCTO), 0, DESTRUCTO__STATICRR }, - { "RRTILE38", DVPTR(TILE_RRTILE38), 0, RRTILE38__STATICRR }, - { "RRTILE43", DVPTR(TILE_RRTILE43), 0, RRTILE43__STATICRR }, { "GUTMETER", DVPTR(TILE_GUTMETER), 0, GUTMETER__STATICRR }, - { "RRTILE63", DVPTR(TILE_RRTILE63), 0, RRTILE63__STATICRR }, - { "RRTILE64", DVPTR(TILE_RRTILE64), 0, RRTILE64__STATICRR }, - { "RRTILE65", DVPTR(TILE_RRTILE65), 0, RRTILE65__STATICRR }, - { "RRTILE66", DVPTR(TILE_RRTILE66), 0, RRTILE66__STATICRR }, - { "RRTILE67", DVPTR(TILE_RRTILE67), 0, RRTILE67__STATICRR }, - { "RRTILE68", DVPTR(TILE_RRTILE68), 0, RRTILE68__STATICRR }, { "SOUNDFX", DVPTR(TILE_SOUNDFX), 0, SOUNDFX__STATICRR }, { "MOTOAMMO", DVPTR(TILE_MOTOAMMO), 0, MOTOAMMO__STATICRR }, { "UFOBEAM", DVPTR(TILE_UFOBEAM), 0, UFOBEAM__STATICRR }, - { "RRTILE280", DVPTR(TILE_RRTILE280), 0, RRTILE280__STATICRR }, - { "RRTILE281", DVPTR(TILE_RRTILE281), 0, RRTILE281__STATICRR }, - { "RRTILE282", DVPTR(TILE_RRTILE282), 0, RRTILE282__STATICRR }, - { "RRTILE283", DVPTR(TILE_RRTILE283), 0, RRTILE283__STATICRR }, - { "RRTILE285", DVPTR(TILE_RRTILE285), 0, RRTILE285__STATICRR }, - { "RRTILE286", DVPTR(TILE_RRTILE286), 0, RRTILE286__STATICRR }, - { "RRTILE287", DVPTR(TILE_RRTILE287), 0, RRTILE287__STATICRR }, - { "RRTILE288", DVPTR(TILE_RRTILE288), 0, RRTILE288__STATICRR }, - { "RRTILE289", DVPTR(TILE_RRTILE289), 0, RRTILE289__STATICRR }, - { "RRTILE290", DVPTR(TILE_RRTILE290), 0, RRTILE290__STATICRR }, - { "RRTILE291", DVPTR(TILE_RRTILE291), 0, RRTILE291__STATICRR }, - { "RRTILE292", DVPTR(TILE_RRTILE292), 0, RRTILE292__STATICRR }, - { "RRTILE293", DVPTR(TILE_RRTILE293), 0, RRTILE293__STATICRR }, - { "RRTILE295", DVPTR(TILE_RRTILE295), 0, RRTILE295__STATICRR }, - { "RRTILE296", DVPTR(TILE_RRTILE296), 0, RRTILE296__STATICRR }, - { "RRTILE297", DVPTR(TILE_RRTILE297), 0, RRTILE297__STATICRR }, { "CDPLAYER", DVPTR(TILE_CDPLAYER), 0, CDPLAYER__STATICRR }, - { "RRTILE380", DVPTR(TILE_RRTILE380), 0, RRTILE380__STATICRR }, - { "RRTILE403", DVPTR(TILE_RRTILE403), 0, RRTILE403__STATICRR }, - { "RRTILE409", DVPTR(TILE_RRTILE409), 0, RRTILE409__STATICRR }, { "GUTMETER_LIGHT1", DVPTR(TILE_GUTMETER_LIGHT1), 0, GUTMETER_LIGHT1__STATICRR }, { "GUTMETER_LIGHT2", DVPTR(TILE_GUTMETER_LIGHT2), 0, GUTMETER_LIGHT2__STATICRR }, { "GUTMETER_LIGHT3", DVPTR(TILE_GUTMETER_LIGHT3), 0, GUTMETER_LIGHT3__STATICRR }, { "GUTMETER_LIGHT4", DVPTR(TILE_GUTMETER_LIGHT4), 0, GUTMETER_LIGHT4__STATICRR }, { "AMMO_ICON", DVPTR(TILE_AMMO_ICON), 0, AMMO_ICON__STATICRR }, - { "RRTILE409", DVPTR(TILE_RRTILE1076), 0, RRTILE1076__STATICRR }, { "MUD", DVPTR(TILE_MUD), 0, MUD__STATICRR }, { "EXPLOSION3", DVPTR(TILE_EXPLOSION3), 0, EXPLOSION3__STATICRR }, - { "RRTILE1636", DVPTR(TILE_RRTILE1636), 0, RRTILE1636__STATICRR }, { "WEAPONBAR", DVPTR(TILE_WEAPONBAR), 0, WEAPONBAR__STATICRR }, - { "RRTILE1752", DVPTR(TILE_RRTILE1752), 0, RRTILE1752__STATICRR }, { "RPG2", DVPTR(TILE_RPG2), 0, RPG2__STATICRR }, - { "RRTILE1790", DVPTR(TILE_RRTILE1790), 0, RRTILE1790__STATICRR }, - { "RRTILE1792", DVPTR(TILE_RRTILE1792), 0, RRTILE1792__STATICRR }, - { "RRTILE1801", DVPTR(TILE_RRTILE1801), 0, RRTILE1801__STATICRR }, - { "RRTILE1805", DVPTR(TILE_RRTILE1805), 0, RRTILE1805__STATICRR }, - { "RRTILE1807", DVPTR(TILE_RRTILE1807), 0, RRTILE1807__STATICRR }, - { "RRTILE1808", DVPTR(TILE_RRTILE1808), 0, RRTILE1808__STATICRR }, - { "RRTILE1812", DVPTR(TILE_RRTILE1812), 0, RRTILE1812__STATICRR }, - { "RRTILE1814", DVPTR(TILE_RRTILE1814), 0, RRTILE1814__STATICRR }, - { "RRTILE1817", DVPTR(TILE_RRTILE1817), 0, RRTILE1817__STATICRR }, - { "RRTILE1821", DVPTR(TILE_RRTILE1821), 0, RRTILE1821__STATICRR }, - { "RRTILE1824", DVPTR(TILE_RRTILE1824), 0, RRTILE1824__STATICRR }, - { "RRTILE1826", DVPTR(TILE_RRTILE1826), 0, RRTILE1826__STATICRR }, - { "RRTILE1850", DVPTR(TILE_RRTILE1850), 0, RRTILE1850__STATICRR }, - { "RRTILE1851", DVPTR(TILE_RRTILE1851), 0, RRTILE1851__STATICRR }, - { "RRTILE1856", DVPTR(TILE_RRTILE1856), 0, RRTILE1856__STATICRR }, - { "RRTILE1877", DVPTR(TILE_RRTILE1877), 0, RRTILE1877__STATICRR }, - { "RRTILE1878", DVPTR(TILE_RRTILE1878), 0, RRTILE1878__STATICRR }, - { "RRTILE1938", DVPTR(TILE_RRTILE1938), 0, RRTILE1938__STATICRR }, - { "RRTILE1939", DVPTR(TILE_RRTILE1939), 0, RRTILE1939__STATICRR }, - { "RRTILE1942", DVPTR(TILE_RRTILE1942), 0, RRTILE1942__STATICRR }, - { "RRTILE1944", DVPTR(TILE_RRTILE1944), 0, RRTILE1944__STATICRR }, - { "RRTILE1945", DVPTR(TILE_RRTILE1945), 0, RRTILE1945__STATICRR }, - { "RRTILE1947", DVPTR(TILE_RRTILE1947), 0, RRTILE1947__STATICRR }, - { "RRTILE1951", DVPTR(TILE_RRTILE1951), 0, RRTILE1951__STATICRR }, - { "RRTILE1952", DVPTR(TILE_RRTILE1952), 0, RRTILE1952__STATICRR }, - { "RRTILE1953", DVPTR(TILE_RRTILE1953), 0, RRTILE1953__STATICRR }, - { "RRTILE1961", DVPTR(TILE_RRTILE1961), 0, RRTILE1961__STATICRR }, - { "RRTILE1964", DVPTR(TILE_RRTILE1964), 0, RRTILE1964__STATICRR }, - { "RRTILE1973", DVPTR(TILE_RRTILE1973), 0, RRTILE1973__STATICRR }, - { "RRTILE1985", DVPTR(TILE_RRTILE1985), 0, RRTILE1985__STATICRR }, - { "RRTILE1986", DVPTR(TILE_RRTILE1986), 0, RRTILE1986__STATICRR }, - { "RRTILE1987", DVPTR(TILE_RRTILE1987), 0, RRTILE1987__STATICRR }, - { "RRTILE1988", DVPTR(TILE_RRTILE1988), 0, RRTILE1988__STATICRR }, - { "RRTILE1990", DVPTR(TILE_RRTILE1990), 0, RRTILE1990__STATICRR }, - { "RRTILE1995", DVPTR(TILE_RRTILE1995), 0, RRTILE1995__STATICRR }, - { "RRTILE1996", DVPTR(TILE_RRTILE1996), 0, RRTILE1996__STATICRR }, - { "RRTILE2004", DVPTR(TILE_RRTILE2004), 0, RRTILE2004__STATICRR }, - { "RRTILE2005", DVPTR(TILE_RRTILE2005), 0, RRTILE2005__STATICRR }, { "POPCORN", DVPTR(TILE_POPCORN), 0, POPCORN__STATICRR }, - { "RRTILE2022", DVPTR(TILE_RRTILE2022), 0, RRTILE2022__STATICRR }, { "LANEPICS", DVPTR(TILE_LANEPICS), 0, LANEPICS__STATICRR }, - { "RRTILE2025", DVPTR(TILE_RRTILE2025), 0, RRTILE2025__STATICRR }, - { "RRTILE2026", DVPTR(TILE_RRTILE2026), 0, RRTILE2026__STATICRR }, - { "RRTILE2027", DVPTR(TILE_RRTILE2027), 0, RRTILE2027__STATICRR }, - { "RRTILE2028", DVPTR(TILE_RRTILE2028), 0, RRTILE2028__STATICRR }, - { "RRTILE2034", DVPTR(TILE_RRTILE2034), 0, RRTILE2034__STATICRR }, - { "RRTILE2050", DVPTR(TILE_RRTILE2050), 0, RRTILE2050__STATICRR }, - { "RRTILE2052", DVPTR(TILE_RRTILE2052), 0, RRTILE2052__STATICRR }, - { "RRTILE2053", DVPTR(TILE_RRTILE2053), 0, RRTILE2053__STATICRR }, - { "RRTILE2056", DVPTR(TILE_RRTILE2056), 0, RRTILE2056__STATICRR }, - { "RRTILE2060", DVPTR(TILE_RRTILE2060), 0, RRTILE2060__STATICRR }, - { "RRTILE2072", DVPTR(TILE_RRTILE2072), 0, RRTILE2072__STATICRR }, - { "RRTILE2074", DVPTR(TILE_RRTILE2074), 0, RRTILE2074__STATICRR }, - { "RRTILE2075", DVPTR(TILE_RRTILE2075), 0, RRTILE2075__STATICRR }, - { "RRTILE2083", DVPTR(TILE_RRTILE2083), 0, RRTILE2083__STATICRR }, - { "RRTILE2097", DVPTR(TILE_RRTILE2097), 0, RRTILE2097__STATICRR }, - { "RRTILE2121", DVPTR(TILE_RRTILE2121), 0, RRTILE2121__STATICRR }, - { "RRTILE2122", DVPTR(TILE_RRTILE2122), 0, RRTILE2122__STATICRR }, - { "RRTILE2123", DVPTR(TILE_RRTILE2123), 0, RRTILE2123__STATICRR }, - { "RRTILE2124", DVPTR(TILE_RRTILE2124), 0, RRTILE2124__STATICRR }, - { "RRTILE2125", DVPTR(TILE_RRTILE2125), 0, RRTILE2125__STATICRR }, - { "RRTILE2126", DVPTR(TILE_RRTILE2126), 0, RRTILE2126__STATICRR }, - { "RRTILE2137", DVPTR(TILE_RRTILE2137), 0, RRTILE2137__STATICRR }, - { "RRTILE2132", DVPTR(TILE_RRTILE2132), 0, RRTILE2132__STATICRR }, - { "RRTILE2136", DVPTR(TILE_RRTILE2136), 0, RRTILE2136__STATICRR }, - { "RRTILE2139", DVPTR(TILE_RRTILE2139), 0, RRTILE2139__STATICRR }, - { "RRTILE2150", DVPTR(TILE_RRTILE2150), 0, RRTILE2150__STATICRR }, - { "RRTILE2151", DVPTR(TILE_RRTILE2151), 0, RRTILE2151__STATICRR }, - { "RRTILE2152", DVPTR(TILE_RRTILE2152), 0, RRTILE2152__STATICRR }, - { "RRTILE2156", DVPTR(TILE_RRTILE2156), 0, RRTILE2156__STATICRR }, - { "RRTILE2157", DVPTR(TILE_RRTILE2157), 0, RRTILE2157__STATICRR }, - { "RRTILE2158", DVPTR(TILE_RRTILE2158), 0, RRTILE2158__STATICRR }, - { "RRTILE2159", DVPTR(TILE_RRTILE2159), 0, RRTILE2159__STATICRR }, - { "RRTILE2160", DVPTR(TILE_RRTILE2160), 0, RRTILE2160__STATICRR }, - { "RRTILE2161", DVPTR(TILE_RRTILE2161), 0, RRTILE2161__STATICRR }, - { "RRTILE2175", DVPTR(TILE_RRTILE2175), 0, RRTILE2175__STATICRR }, - { "RRTILE2176", DVPTR(TILE_RRTILE2176), 0, RRTILE2176__STATICRR }, - { "RRTILE2178", DVPTR(TILE_RRTILE2178), 0, RRTILE2178__STATICRR }, - { "RRTILE2186", DVPTR(TILE_RRTILE2186), 0, RRTILE2186__STATICRR }, - { "RRTILE2214", DVPTR(TILE_RRTILE2214), 0, RRTILE2214__STATICRR }, - { "RRTILE2319", DVPTR(TILE_RRTILE2319), 0, RRTILE2319__STATICRR }, - { "RRTILE2321", DVPTR(TILE_RRTILE2321), 0, RRTILE2321__STATICRR }, - { "RRTILE2326", DVPTR(TILE_RRTILE2326), 0, RRTILE2326__STATICRR }, - { "RRTILE2329", DVPTR(TILE_RRTILE2329), 0, RRTILE2329__STATICRR }, - { "RRTILE2357", DVPTR(TILE_RRTILE2357), 0, RRTILE2357__STATICRR }, - { "RRTILE2382", DVPTR(TILE_RRTILE2382), 0, RRTILE2382__STATICRR }, - { "RRTILE2430", DVPTR(TILE_RRTILE2430), 0, RRTILE2430__STATICRR }, - { "RRTILE2431", DVPTR(TILE_RRTILE2431), 0, RRTILE2431__STATICRR }, - { "RRTILE2432", DVPTR(TILE_RRTILE2432), 0, RRTILE2432__STATICRR }, - { "RRTILE2437", DVPTR(TILE_RRTILE2437), 0, RRTILE2437__STATICRR }, - { "RRTILE2443", DVPTR(TILE_RRTILE2443), 0, RRTILE2443__STATICRR }, - { "RRTILE2445", DVPTR(TILE_RRTILE2445), 0, RRTILE2445__STATICRR }, - { "RRTILE2446", DVPTR(TILE_RRTILE2446), 0, RRTILE2446__STATICRR }, - { "RRTILE2450", DVPTR(TILE_RRTILE2450), 0, RRTILE2450__STATICRR }, - { "RRTILE2451", DVPTR(TILE_RRTILE2451), 0, RRTILE2451__STATICRR }, - { "RRTILE2455", DVPTR(TILE_RRTILE2455), 0, RRTILE2455__STATICRR }, - { "RRTILE2460", DVPTR(TILE_RRTILE2460), 0, RRTILE2460__STATICRR }, - { "RRTILE2465", DVPTR(TILE_RRTILE2465), 0, RRTILE2465__STATICRR }, - { "RRTILE2560", DVPTR(TILE_RRTILE2560), 0, RRTILE2560__STATICRR }, - { "RRTILE2562", DVPTR(TILE_RRTILE2562), 0, RRTILE2562__STATICRR }, - { "RRTILE2564", DVPTR(TILE_RRTILE2564), 0, RRTILE2564__STATICRR }, - { "RRTILE2573", DVPTR(TILE_RRTILE2573), 0, RRTILE2573__STATICRR }, - { "RRTILE2574", DVPTR(TILE_RRTILE2574), 0, RRTILE2574__STATICRR }, - { "RRTILE2577", DVPTR(TILE_RRTILE2577), 0, RRTILE2577__STATICRR }, - { "RRTILE2578", DVPTR(TILE_RRTILE2578), 0, RRTILE2578__STATICRR }, - { "RRTILE2581", DVPTR(TILE_RRTILE2581), 0, RRTILE2581__STATICRR }, - { "RRTILE2583", DVPTR(TILE_RRTILE2583), 0, RRTILE2583__STATICRR }, - { "RRTILE2604", DVPTR(TILE_RRTILE2604), 0, RRTILE2604__STATICRR }, - { "RRTILE2610", DVPTR(TILE_RRTILE2610), 0, RRTILE2610__STATICRR }, - { "RRTILE2613", DVPTR(TILE_RRTILE2613), 0, RRTILE2613__STATICRR }, - { "RRTILE2621", DVPTR(TILE_RRTILE2621), 0, RRTILE2621__STATICRR }, - { "RRTILE2622", DVPTR(TILE_RRTILE2622), 0, RRTILE2622__STATICRR }, - { "RRTILE2636", DVPTR(TILE_RRTILE2636), 0, RRTILE2636__STATICRR }, - { "RRTILE2637", DVPTR(TILE_RRTILE2637), 0, RRTILE2637__STATICRR }, - { "RRTILE2654", DVPTR(TILE_RRTILE2654), 0, RRTILE2654__STATICRR }, - { "RRTILE2656", DVPTR(TILE_RRTILE2656), 0, RRTILE2656__STATICRR }, - { "RRTILE2676", DVPTR(TILE_RRTILE2676), 0, RRTILE2676__STATICRR }, - { "RRTILE2689", DVPTR(TILE_RRTILE2689), 0, RRTILE2689__STATICRR }, - { "RRTILE2697", DVPTR(TILE_RRTILE2697), 0, RRTILE2697__STATICRR }, - { "RRTILE2702", DVPTR(TILE_RRTILE2702), 0, RRTILE2702__STATICRR }, - { "RRTILE2707", DVPTR(TILE_RRTILE2707), 0, RRTILE2707__STATICRR }, - { "RRTILE2732", DVPTR(TILE_RRTILE2732), 0, RRTILE2732__STATICRR }, - { "RRTILE2030", DVPTR(TILE_RRTILE2030), 0, RRTILE2030__STATICRR }, - { "RRTILE2831", DVPTR(TILE_RRTILE2831), 0, RRTILE2831__STATICRR }, - { "RRTILE2832", DVPTR(TILE_RRTILE2832), 0, RRTILE2832__STATICRR }, - { "RRTILE2842", DVPTR(TILE_RRTILE2842), 0, RRTILE2842__STATICRR }, - { "RRTILE2859", DVPTR(TILE_RRTILE2859), 0, RRTILE2859__STATICRR }, - { "RRTILE2876", DVPTR(TILE_RRTILE2876), 0, RRTILE2876__STATICRR }, - { "RRTILE2878", DVPTR(TILE_RRTILE2878), 0, RRTILE2878__STATICRR }, - { "RRTILE2879", DVPTR(TILE_RRTILE2879), 0, RRTILE2879__STATICRR }, - { "RRTILE2893", DVPTR(TILE_RRTILE2893), 0, RRTILE2893__STATICRR }, - { "RRTILE2894", DVPTR(TILE_RRTILE2894), 0, RRTILE2894__STATICRR }, - { "RRTILE2898", DVPTR(TILE_RRTILE2898), 0, RRTILE2898__STATICRR }, - { "RRTILE2899", DVPTR(TILE_RRTILE2899), 0, RRTILE2899__STATICRR }, - { "RRTILE2915", DVPTR(TILE_RRTILE2915), 0, RRTILE2915__STATICRR }, - { "RRTILE2940", DVPTR(TILE_RRTILE2940), 0, RRTILE2940__STATICRR }, - { "RRTILE2944", DVPTR(TILE_RRTILE2944), 0, RRTILE2944__STATICRR }, - { "RRTILE2945", DVPTR(TILE_RRTILE2945), 0, RRTILE2945__STATICRR }, - { "RRTILE2946", DVPTR(TILE_RRTILE2946), 0, RRTILE2946__STATICRR }, - { "RRTILE2947", DVPTR(TILE_RRTILE2947), 0, RRTILE2947__STATICRR }, - { "RRTILE2948", DVPTR(TILE_RRTILE2948), 0, RRTILE2948__STATICRR }, - { "RRTILE2949", DVPTR(TILE_RRTILE2949), 0, RRTILE2949__STATICRR }, - { "RRTILE2961", DVPTR(TILE_RRTILE2961), 0, RRTILE2961__STATICRR }, - { "RRTILE2970", DVPTR(TILE_RRTILE2970), 0, RRTILE2970__STATICRR }, - { "RRTILE2977", DVPTR(TILE_RRTILE2977), 0, RRTILE2977__STATICRR }, - { "RRTILE2978", DVPTR(TILE_RRTILE2978), 0, RRTILE2978__STATICRR }, - { "RRTILE2990", DVPTR(TILE_RRTILE2990), 0, RRTILE2990__STATICRR }, - { "RRTILE3073", DVPTR(TILE_RRTILE3073), 0, RRTILE3073__STATICRR }, - { "RRTILE3083", DVPTR(TILE_RRTILE3083), 0, RRTILE3083__STATICRR }, - { "RRTILE3100", DVPTR(TILE_RRTILE3100), 0, RRTILE3100__STATICRR }, - { "RRTILE3114", DVPTR(TILE_RRTILE3114), 0, RRTILE3114__STATICRR }, - { "RRTILE3115", DVPTR(TILE_RRTILE3115), 0, RRTILE3115__STATICRR }, - { "RRTILE3116", DVPTR(TILE_RRTILE3116), 0, RRTILE3116__STATICRR }, - { "RRTILE3117", DVPTR(TILE_RRTILE3117), 0, RRTILE3117__STATICRR }, - { "RRTILE3120", DVPTR(TILE_RRTILE3120), 0, RRTILE3120__STATICRR }, - { "RRTILE3121", DVPTR(TILE_RRTILE3121), 0, RRTILE3121__STATICRR }, - { "RRTILE3122", DVPTR(TILE_RRTILE3122), 0, RRTILE3122__STATICRR }, - { "RRTILE3123", DVPTR(TILE_RRTILE3123), 0, RRTILE3123__STATICRR }, - { "RRTILE3124", DVPTR(TILE_RRTILE3124), 0, RRTILE3124__STATICRR }, - { "RRTILE3132", DVPTR(TILE_RRTILE3132), 0, RRTILE3132__STATICRR }, - { "RRTILE3139", DVPTR(TILE_RRTILE3139), 0, RRTILE3139__STATICRR }, - { "RRTILE3144", DVPTR(TILE_RRTILE3144), 0, RRTILE3144__STATICRR }, - { "RRTILE3152", DVPTR(TILE_RRTILE3152), 0, RRTILE3152__STATICRR }, - { "RRTILE3153", DVPTR(TILE_RRTILE3153), 0, RRTILE3153__STATICRR }, - { "RRTILE3155", DVPTR(TILE_RRTILE3155), 0, RRTILE3155__STATICRR }, - { "RRTILE3171", DVPTR(TILE_RRTILE3171), 0, RRTILE3171__STATICRR }, - { "RRTILE3172", DVPTR(TILE_RRTILE3172), 0, RRTILE3172__STATICRR }, - { "RRTILE3190", DVPTR(TILE_RRTILE3190), 0, RRTILE3190__STATICRR }, - { "RRTILE3191", DVPTR(TILE_RRTILE3191), 0, RRTILE3191__STATICRR }, - { "RRTILE3192", DVPTR(TILE_RRTILE3192), 0, RRTILE3192__STATICRR }, - { "RRTILE3195", DVPTR(TILE_RRTILE3195), 0, RRTILE3195__STATICRR }, - { "RRTILE3200", DVPTR(TILE_RRTILE3200), 0, RRTILE3200__STATICRR }, - { "RRTILE3201", DVPTR(TILE_RRTILE3201), 0, RRTILE3201__STATICRR }, - { "RRTILE3202", DVPTR(TILE_RRTILE3202), 0, RRTILE3202__STATICRR }, - { "RRTILE3203", DVPTR(TILE_RRTILE3203), 0, RRTILE3203__STATICRR }, - { "RRTILE3204", DVPTR(TILE_RRTILE3204), 0, RRTILE3204__STATICRR }, - { "RRTILE3205", DVPTR(TILE_RRTILE3205), 0, RRTILE3205__STATICRR }, - { "RRTILE3206", DVPTR(TILE_RRTILE3206), 0, RRTILE3206__STATICRR }, - { "RRTILE3207", DVPTR(TILE_RRTILE3207), 0, RRTILE3207__STATICRR }, - { "RRTILE3208", DVPTR(TILE_RRTILE3208), 0, RRTILE3208__STATICRR }, - { "RRTILE3209", DVPTR(TILE_RRTILE3209), 0, RRTILE3209__STATICRR }, - { "RRTILE3216", DVPTR(TILE_RRTILE3216), 0, RRTILE3216__STATICRR }, - { "RRTILE3218", DVPTR(TILE_RRTILE3218), 0, RRTILE3218__STATICRR }, - { "RRTILE3219", DVPTR(TILE_RRTILE3219), 0, RRTILE3219__STATICRR }, - { "RRTILE3232", DVPTR(TILE_RRTILE3232), 0, RRTILE3232__STATICRR }, { "SHOTGUNSHELLS", DVPTR(TILE_SHOTGUNSHELLS), 0, SHOTGUNSHELLS__STATICRR }, { "CIRCLESTUCK", DVPTR(TILE_CIRCLESTUCK), 0, CIRCLESTUCK__STATICRR }, - { "RRTILE3410", DVPTR(TILE_RRTILE3410), 0, RRTILE3410__STATICRR }, { "LUMBERBLADE", DVPTR(TILE_LUMBERBLADE), 0, LUMBERBLADE__STATICRR }, { "BOWLINGBALLH", DVPTR(TILE_BOWLINGBALLH), 0, BOWLINGBALLH__STATICRR }, { "BOWLINGBALL", DVPTR(TILE_BOWLINGBALL), 0, BOWLINGBALL__STATICRR }, { "BOWLINGBALLSPRITE", DVPTR(TILE_BOWLINGBALLSPRITE), 0, BOWLINGBALLSPRITE__STATICRR }, { "POWDERH", DVPTR(TILE_POWDERH), 0, POWDERH__STATICRR }, - { "RRTILE3440", DVPTR(TILE_RRTILE3440), 0, RRTILE3440__STATICRR }, - { "RRTILE3462", DVPTR(TILE_RRTILE3462), 0, RRTILE3462__STATICRR }, { "OWHIP", DVPTR(TILE_OWHIP), 0, OWHIP__STATICRR }, { "UWHIP", DVPTR(TILE_UWHIP), 0, UWHIP__STATICRR }, { "RPGGUN2", DVPTR(TILE_RPGGUN2), 0, RPGGUN2__STATICRR }, - { "RRTILE3497", DVPTR(TILE_RRTILE3497), 0, RRTILE3497__STATICRR }, - { "RRTILE3498", DVPTR(TILE_RRTILE3498), 0, RRTILE3498__STATICRR }, - { "RRTILE3499", DVPTR(TILE_RRTILE3499), 0, RRTILE3499__STATICRR }, - { "RRTILE3500", DVPTR(TILE_RRTILE3500), 0, RRTILE3500__STATICRR }, { "SLINGBLADE", DVPTR(TILE_SLINGBLADE), 0, SLINGBLADE__STATICRR }, - { "RRTILE3584", DVPTR(TILE_RRTILE3584), 0, RRTILE3584__STATICRR }, - { "RRTILE3586", DVPTR(TILE_RRTILE3586), 0, RRTILE3586__STATICRR }, - { "RRTILE3587", DVPTR(TILE_RRTILE3587), 0, RRTILE3587__STATICRR }, - { "RRTILE3600", DVPTR(TILE_RRTILE3600), 0, RRTILE3600__STATICRR }, - { "RRTILE3631", DVPTR(TILE_RRTILE3631), 0, RRTILE3631__STATICRR }, - { "RRTILE3635", DVPTR(TILE_RRTILE3635), 0, RRTILE3635__STATICRR }, - { "RRTILE3637", DVPTR(TILE_RRTILE3637), 0, RRTILE3637__STATICRR }, - { "RRTILE3643", DVPTR(TILE_RRTILE3643), 0, RRTILE3643__STATICRR }, - { "RRTILE3647", DVPTR(TILE_RRTILE3647), 0, RRTILE3647__STATICRR }, - { "RRTILE3652", DVPTR(TILE_RRTILE3652), 0, RRTILE3652__STATICRR }, - { "RRTILE3653", DVPTR(TILE_RRTILE3653), 0, RRTILE3653__STATICRR }, - { "RRTILE3668", DVPTR(TILE_RRTILE3668), 0, RRTILE3668__STATICRR }, - { "RRTILE3671", DVPTR(TILE_RRTILE3671), 0, RRTILE3671__STATICRR }, - { "RRTILE3673", DVPTR(TILE_RRTILE3673), 0, RRTILE3673__STATICRR }, - { "RRTILE3677", DVPTR(TILE_RRTILE3677), 0, RRTILE3677__STATICRR }, - { "RRTILE3684", DVPTR(TILE_RRTILE3684), 0, RRTILE3684__STATICRR }, - { "RRTILE3708", DVPTR(TILE_RRTILE3708), 0, RRTILE3708__STATICRR }, - { "RRTILE3714", DVPTR(TILE_RRTILE3714), 0, RRTILE3714__STATICRR }, - { "RRTILE3716", DVPTR(TILE_RRTILE3716), 0, RRTILE3716__STATICRR }, - { "RRTILE3720", DVPTR(TILE_RRTILE3720), 0, RRTILE3720__STATICRR }, - { "RRTILE3723", DVPTR(TILE_RRTILE3723), 0, RRTILE3723__STATICRR }, - { "RRTILE3725", DVPTR(TILE_RRTILE3725), 0, RRTILE3725__STATICRR }, - { "RRTILE3737", DVPTR(TILE_RRTILE3737), 0, RRTILE3737__STATICRR }, - { "RRTILE3754", DVPTR(TILE_RRTILE3754), 0, RRTILE3754__STATICRR }, - { "RRTILE3762", DVPTR(TILE_RRTILE3762), 0, RRTILE3762__STATICRR }, - { "RRTILE3763", DVPTR(TILE_RRTILE3763), 0, RRTILE3763__STATICRR }, - { "RRTILE3764", DVPTR(TILE_RRTILE3764), 0, RRTILE3764__STATICRR }, - { "RRTILE3765", DVPTR(TILE_RRTILE3765), 0, RRTILE3765__STATICRR }, - { "RRTILE3767", DVPTR(TILE_RRTILE3767), 0, RRTILE3767__STATICRR }, - { "RRTILE3773", DVPTR(TILE_RRTILE3773), 0, RRTILE3773__STATICRR }, - { "RRTILE3774", DVPTR(TILE_RRTILE3774), 0, RRTILE3774__STATICRR }, - { "RRTILE3793", DVPTR(TILE_RRTILE3793), 0, RRTILE3793__STATICRR }, - { "RRTILE3795", DVPTR(TILE_RRTILE3795), 0, RRTILE3795__STATICRR }, - { "RRTILE3804", DVPTR(TILE_RRTILE3804), 0, RRTILE3804__STATICRR }, - { "RRTILE3814", DVPTR(TILE_RRTILE3814), 0, RRTILE3814__STATICRR }, - { "RRTILE3815", DVPTR(TILE_RRTILE3815), 0, RRTILE3815__STATICRR }, - { "RRTILE3819", DVPTR(TILE_RRTILE3819), 0, RRTILE3819__STATICRR }, - { "RRTILE3827", DVPTR(TILE_RRTILE3827), 0, RRTILE3827__STATICRR }, - { "RRTILE3837", DVPTR(TILE_RRTILE3837), 0, RRTILE3837__STATICRR }, - { "RRTILE5014", DVPTR(TILE_RRTILE5014), 0, RRTILE5014__STATICRR }, - { "RRTILE5016", DVPTR(TILE_RRTILE5016), 0, RRTILE5016__STATICRR }, - { "RRTILE5017", DVPTR(TILE_RRTILE5017), 0, RRTILE5017__STATICRR }, - { "RRTILE5018", DVPTR(TILE_RRTILE5018), 0, RRTILE5018__STATICRR }, - { "RRTILE5019", DVPTR(TILE_RRTILE5019), 0, RRTILE5019__STATICRR }, - { "RRTILE5020", DVPTR(TILE_RRTILE5020), 0, RRTILE5020__STATICRR }, - { "RRTILE5021", DVPTR(TILE_RRTILE5021), 0, RRTILE5021__STATICRR }, - { "RRTILE5022", DVPTR(TILE_RRTILE5022), 0, RRTILE5022__STATICRR }, - { "RRTILE5023", DVPTR(TILE_RRTILE5023), 0, RRTILE5023__STATICRR }, - { "RRTILE5024", DVPTR(TILE_RRTILE5024), 0, RRTILE5024__STATICRR }, - { "RRTILE5025", DVPTR(TILE_RRTILE5025), 0, RRTILE5025__STATICRR }, - { "RRTILE5026", DVPTR(TILE_RRTILE5026), 0, RRTILE5026__STATICRR }, - { "RRTILE5027", DVPTR(TILE_RRTILE5027), 0, RRTILE5027__STATICRR }, - { "RRTILE5029", DVPTR(TILE_RRTILE5029), 0, RRTILE5029__STATICRR }, - { "RRTILE5030", DVPTR(TILE_RRTILE5030), 0, RRTILE5030__STATICRR }, - { "RRTILE5031", DVPTR(TILE_RRTILE5031), 0, RRTILE5031__STATICRR }, - { "RRTILE5032", DVPTR(TILE_RRTILE5032), 0, RRTILE5032__STATICRR }, - { "RRTILE5033", DVPTR(TILE_RRTILE5033), 0, RRTILE5033__STATICRR }, - { "RRTILE5034", DVPTR(TILE_RRTILE5034), 0, RRTILE5034__STATICRR }, - { "RRTILE5035", DVPTR(TILE_RRTILE5035), 0, RRTILE5035__STATICRR }, - { "RRTILE5036", DVPTR(TILE_RRTILE5036), 0, RRTILE5036__STATICRR }, - { "RRTILE5037", DVPTR(TILE_RRTILE5037), 0, RRTILE5037__STATICRR }, - { "RRTILE5038", DVPTR(TILE_RRTILE5038), 0, RRTILE5038__STATICRR }, - { "RRTILE5039", DVPTR(TILE_RRTILE5039), 0, RRTILE5039__STATICRR }, - { "RRTILE5040", DVPTR(TILE_RRTILE5040), 0, RRTILE5040__STATICRR }, - { "RRTILE5041", DVPTR(TILE_RRTILE5041), 0, RRTILE5041__STATICRR }, - { "RRTILE5043", DVPTR(TILE_RRTILE5043), 0, RRTILE5043__STATICRR }, - { "RRTILE5044", DVPTR(TILE_RRTILE5044), 0, RRTILE5044__STATICRR }, - { "RRTILE5045", DVPTR(TILE_RRTILE5045), 0, RRTILE5045__STATICRR }, - { "RRTILE5046", DVPTR(TILE_RRTILE5046), 0, RRTILE5046__STATICRR }, - { "RRTILE5047", DVPTR(TILE_RRTILE5047), 0, RRTILE5047__STATICRR }, - { "RRTILE5048", DVPTR(TILE_RRTILE5048), 0, RRTILE5048__STATICRR }, - { "RRTILE5049", DVPTR(TILE_RRTILE5049), 0, RRTILE5049__STATICRR }, - { "RRTILE5050", DVPTR(TILE_RRTILE5050), 0, RRTILE5050__STATICRR }, - { "RRTILE5051", DVPTR(TILE_RRTILE5051), 0, RRTILE5051__STATICRR }, - { "RRTILE5052", DVPTR(TILE_RRTILE5052), 0, RRTILE5052__STATICRR }, - { "RRTILE5053", DVPTR(TILE_RRTILE5053), 0, RRTILE5053__STATICRR }, - { "RRTILE5054", DVPTR(TILE_RRTILE5054), 0, RRTILE5054__STATICRR }, - { "RRTILE5055", DVPTR(TILE_RRTILE5055), 0, RRTILE5055__STATICRR }, - { "RRTILE5056", DVPTR(TILE_RRTILE5056), 0, RRTILE5056__STATICRR }, - { "RRTILE5057", DVPTR(TILE_RRTILE5057), 0, RRTILE5057__STATICRR }, - { "RRTILE5058", DVPTR(TILE_RRTILE5058), 0, RRTILE5058__STATICRR }, - { "RRTILE5059", DVPTR(TILE_RRTILE5059), 0, RRTILE5059__STATICRR }, - { "RRTILE5061", DVPTR(TILE_RRTILE5061), 0, RRTILE5061__STATICRR }, - { "RRTILE5062", DVPTR(TILE_RRTILE5062), 0, RRTILE5062__STATICRR }, - { "RRTILE5063", DVPTR(TILE_RRTILE5063), 0, RRTILE5063__STATICRR }, - { "RRTILE5064", DVPTR(TILE_RRTILE5064), 0, RRTILE5064__STATICRR }, - { "RRTILE5065", DVPTR(TILE_RRTILE5065), 0, RRTILE5065__STATICRR }, - { "RRTILE5066", DVPTR(TILE_RRTILE5066), 0, RRTILE5066__STATICRR }, - { "RRTILE5067", DVPTR(TILE_RRTILE5067), 0, RRTILE5067__STATICRR }, - { "RRTILE5068", DVPTR(TILE_RRTILE5068), 0, RRTILE5068__STATICRR }, - { "RRTILE5069", DVPTR(TILE_RRTILE5069), 0, RRTILE5069__STATICRR }, - { "RRTILE5070", DVPTR(TILE_RRTILE5070), 0, RRTILE5070__STATICRR }, - { "RRTILE5071", DVPTR(TILE_RRTILE5071), 0, RRTILE5071__STATICRR }, - { "RRTILE5072", DVPTR(TILE_RRTILE5072), 0, RRTILE5072__STATICRR }, - { "RRTILE5073", DVPTR(TILE_RRTILE5073), 0, RRTILE5073__STATICRR }, - { "RRTILE5074", DVPTR(TILE_RRTILE5074), 0, RRTILE5074__STATICRR }, - { "RRTILE5075", DVPTR(TILE_RRTILE5075), 0, RRTILE5075__STATICRR }, - { "RRTILE5076", DVPTR(TILE_RRTILE5076), 0, RRTILE5076__STATICRR }, - { "RRTILE5077", DVPTR(TILE_RRTILE5077), 0, RRTILE5077__STATICRR }, - { "RRTILE5078", DVPTR(TILE_RRTILE5078), 0, RRTILE5078__STATICRR }, - { "RRTILE5079", DVPTR(TILE_RRTILE5079), 0, RRTILE5079__STATICRR }, - { "RRTILE5080", DVPTR(TILE_RRTILE5080), 0, RRTILE5080__STATICRR }, - { "RRTILE5081", DVPTR(TILE_RRTILE5081), 0, RRTILE5081__STATICRR }, - { "RRTILE5082", DVPTR(TILE_RRTILE5082), 0, RRTILE5082__STATICRR }, - { "RRTILE5083", DVPTR(TILE_RRTILE5083), 0, RRTILE5083__STATICRR }, - { "RRTILE5084", DVPTR(TILE_RRTILE5084), 0, RRTILE5084__STATICRR }, - { "RRTILE5085", DVPTR(TILE_RRTILE5085), 0, RRTILE5085__STATICRR }, - { "RRTILE5086", DVPTR(TILE_RRTILE5086), 0, RRTILE5086__STATICRR }, - { "RRTILE5087", DVPTR(TILE_RRTILE5087), 0, RRTILE5087__STATICRR }, - { "RRTILE5088", DVPTR(TILE_RRTILE5088), 0, RRTILE5088__STATICRR }, - { "RRTILE5090", DVPTR(TILE_RRTILE5090), 0, RRTILE5090__STATICRR }, - { "RRTILE6144", DVPTR(TILE_RRTILE6144), 0, RRTILE6144__STATICRR }, - { "RRTILE7010", DVPTR(TILE_RRTILE7110), 0, RRTILE7110__STATICRR }, - { "RRTILE7011", DVPTR(TILE_RRTILE7111), 0, RRTILE7111__STATICRR }, - { "RRTILE7012", DVPTR(TILE_RRTILE7112), 0, RRTILE7112__STATICRR }, - { "RRTILE7013", DVPTR(TILE_RRTILE7113), 0, RRTILE7113__STATICRR }, { "MOTOGUN", DVPTR(TILE_MOTOGUN), 0, MOTOGUN__STATICRR }, - { "RRTILE7169", DVPTR(TILE_RRTILE7169), 0, RRTILE7169__STATICRR }, { "MOTOHIT", DVPTR(TILE_MOTOHIT), 0, MOTOHIT__STATICRR }, { "BOATHIT", DVPTR(TILE_BOATHIT), 0, BOATHIT__STATICRR }, - { "RRTILE7184", DVPTR(TILE_RRTILE7184), 0, RRTILE7184__STATICRR }, - { "RRTILE7190", DVPTR(TILE_RRTILE7190), 0, RRTILE7190__STATICRR }, - { "RRTILE7191", DVPTR(TILE_RRTILE7191), 0, RRTILE7191__STATICRR }, - { "RRTILE7213", DVPTR(TILE_RRTILE7213), 0, RRTILE7213__STATICRR }, - { "RRTILE7219", DVPTR(TILE_RRTILE7219), 0, RRTILE7219__STATICRR }, { "EMPTYBIKE", DVPTR(TILE_EMPTYBIKE), 0, EMPTYBIKE__STATICRR }, { "EMPTYBOAT", DVPTR(TILE_EMPTYBOAT), 0, EMPTYBOAT__STATICRR }, - { "RRTILE7424", DVPTR(TILE_RRTILE7424), 0, RRTILE7424__STATICRR }, - { "RRTILE7430", DVPTR(TILE_RRTILE7430), 0, RRTILE7430__STATICRR }, - { "RRTILE7433", DVPTR(TILE_RRTILE7433), 0, RRTILE7433__STATICRR }, - { "RRTILE7441", DVPTR(TILE_RRTILE7441), 0, RRTILE7441__STATICRR }, - { "RRTILE7547", DVPTR(TILE_RRTILE7547), 0, RRTILE7547__STATICRR }, - { "RRTILE7467", DVPTR(TILE_RRTILE7467), 0, RRTILE7467__STATICRR }, - { "RRTILE7469", DVPTR(TILE_RRTILE7469), 0, RRTILE7469__STATICRR }, - { "RRTILE7470", DVPTR(TILE_RRTILE7470), 0, RRTILE7470__STATICRR }, - { "RRTILE7475", DVPTR(TILE_RRTILE7475), 0, RRTILE7475__STATICRR }, - { "RRTILE7478", DVPTR(TILE_RRTILE7478), 0, RRTILE7478__STATICRR }, - { "RRTILE7505", DVPTR(TILE_RRTILE7505), 0, RRTILE7505__STATICRR }, - { "RRTILE7506", DVPTR(TILE_RRTILE7506), 0, RRTILE7506__STATICRR }, - { "RRTILE7534", DVPTR(TILE_RRTILE7534), 0, RRTILE7534__STATICRR }, - { "RRTILE7540", DVPTR(TILE_RRTILE7540), 0, RRTILE7540__STATICRR }, - { "RRTILE7533", DVPTR(TILE_RRTILE7533), 0, RRTILE7533__STATICRR }, - { "RRTILE7545", DVPTR(TILE_RRTILE7545), 0, RRTILE7545__STATICRR }, - { "RRTILE7552", DVPTR(TILE_RRTILE7552), 0, RRTILE7552__STATICRR }, - { "RRTILE7553", DVPTR(TILE_RRTILE7553), 0, RRTILE7553__STATICRR }, - { "RRTILE7554", DVPTR(TILE_RRTILE7554), 0, RRTILE7554__STATICRR }, - { "RRTILE7555", DVPTR(TILE_RRTILE7555), 0, RRTILE7555__STATICRR }, - { "RRTILE7557", DVPTR(TILE_RRTILE7557), 0, RRTILE7557__STATICRR }, - { "RRTILE7558", DVPTR(TILE_RRTILE7558), 0, RRTILE7558__STATICRR }, - { "RRTILE7559", DVPTR(TILE_RRTILE7559), 0, RRTILE7559__STATICRR }, - { "RRTILE7561", DVPTR(TILE_RRTILE7561), 0, RRTILE7561__STATICRR }, - { "RRTILE7566", DVPTR(TILE_RRTILE7566), 0, RRTILE7566__STATICRR }, - { "RRTILE7568", DVPTR(TILE_RRTILE7568), 0, RRTILE7568__STATICRR }, - { "RRTILE7574", DVPTR(TILE_RRTILE7574), 0, RRTILE7574__STATICRR }, - { "RRTILE7575", DVPTR(TILE_RRTILE7575), 0, RRTILE7575__STATICRR }, - { "RRTILE7576", DVPTR(TILE_RRTILE7576), 0, RRTILE7576__STATICRR }, - { "RRTILE7578", DVPTR(TILE_RRTILE7578), 0, RRTILE7578__STATICRR }, - { "RRTILE7579", DVPTR(TILE_RRTILE7579), 0, RRTILE7579__STATICRR }, - { "RRTILE7580", DVPTR(TILE_RRTILE7580), 0, RRTILE7580__STATICRR }, - { "RRTILE7595", DVPTR(TILE_RRTILE7595), 0, RRTILE7595__STATICRR }, - { "RRTILE7629", DVPTR(TILE_RRTILE7629), 0, RRTILE7629__STATICRR }, - { "RRTILE7636", DVPTR(TILE_RRTILE7636), 0, RRTILE7636__STATICRR }, - { "RRTILE7638", DVPTR(TILE_RRTILE7638), 0, RRTILE7638__STATICRR }, - { "RRTILE7640", DVPTR(TILE_RRTILE7640), 0, RRTILE7640__STATICRR }, - { "RRTILE7644", DVPTR(TILE_RRTILE7644), 0, RRTILE7644__STATICRR }, - { "RRTILE7646", DVPTR(TILE_RRTILE7646), 0, RRTILE7646__STATICRR }, - { "RRTILE7648", DVPTR(TILE_RRTILE7648), 0, RRTILE7648__STATICRR }, - { "RRTILE7650", DVPTR(TILE_RRTILE7650), 0, RRTILE7650__STATICRR }, - { "RRTILE7653", DVPTR(TILE_RRTILE7653), 0, RRTILE7653__STATICRR }, - { "RRTILE7655", DVPTR(TILE_RRTILE7655), 0, RRTILE7655__STATICRR }, - { "RRTILE7657", DVPTR(TILE_RRTILE7657), 0, RRTILE7657__STATICRR }, - { "RRTILE7659", DVPTR(TILE_RRTILE7659), 0, RRTILE7659__STATICRR }, - { "RRTILE7691", DVPTR(TILE_RRTILE7691), 0, RRTILE7691__STATICRR }, - { "RRTILE7694", DVPTR(TILE_RRTILE7694), 0, RRTILE7694__STATICRR }, - { "RRTILE7696", DVPTR(TILE_RRTILE7696), 0, RRTILE7696__STATICRR }, - { "RRTILE7697", DVPTR(TILE_RRTILE7697), 0, RRTILE7697__STATICRR }, - { "RRTILE7700", DVPTR(TILE_RRTILE7700), 0, RRTILE7700__STATICRR }, - { "RRTILE7702", DVPTR(TILE_RRTILE7702), 0, RRTILE7702__STATICRR }, - { "RRTILE7704", DVPTR(TILE_RRTILE7704), 0, RRTILE7704__STATICRR }, - { "RRTILE7705", DVPTR(TILE_RRTILE7705), 0, RRTILE7705__STATICRR }, - { "RRTILE7711", DVPTR(TILE_RRTILE7711), 0, RRTILE7711__STATICRR }, - { "RRTILE7716", DVPTR(TILE_RRTILE7716), 0, RRTILE7716__STATICRR }, - { "RRTILE7756", DVPTR(TILE_RRTILE7756), 0, RRTILE7756__STATICRR }, - { "RRTILE7768", DVPTR(TILE_RRTILE7768), 0, RRTILE7768__STATICRR }, - { "RRTILE7806", DVPTR(TILE_RRTILE7806), 0, RRTILE7806__STATICRR }, - { "RRTILE7820", DVPTR(TILE_RRTILE7820), 0, RRTILE7820__STATICRR }, - { "RRTILE7859", DVPTR(TILE_RRTILE7859), 0, RRTILE7859__STATICRR }, - { "RRTILE7870", DVPTR(TILE_RRTILE7870), 0, RRTILE7870__STATICRR }, - { "RRTILE7873", DVPTR(TILE_RRTILE7873), 0, RRTILE7873__STATICRR }, - { "RRTILE7875", DVPTR(TILE_RRTILE7875), 0, RRTILE7875__STATICRR }, - { "RRTILE7876", DVPTR(TILE_RRTILE7876), 0, RRTILE7876__STATICRR }, - { "RRTILE7879", DVPTR(TILE_RRTILE7879), 0, RRTILE7879__STATICRR }, - { "RRTILE7881", DVPTR(TILE_RRTILE7881), 0, RRTILE7881__STATICRR }, - { "RRTILE7883", DVPTR(TILE_RRTILE7883), 0, RRTILE7883__STATICRR }, - { "RRTILE7885", DVPTR(TILE_RRTILE7885), 0, RRTILE7885__STATICRR }, - { "RRTILE7886", DVPTR(TILE_RRTILE7886), 0, RRTILE7886__STATICRR }, - { "RRTILE7887", DVPTR(TILE_RRTILE7887), 0, RRTILE7887__STATICRR }, - { "RRTILE7888", DVPTR(TILE_RRTILE7888), 0, RRTILE7888__STATICRR }, - { "RRTILE7889", DVPTR(TILE_RRTILE7889), 0, RRTILE7889__STATICRR }, - { "RRTILE7890", DVPTR(TILE_RRTILE7890), 0, RRTILE7890__STATICRR }, - { "RRTILE7900", DVPTR(TILE_RRTILE7900), 0, RRTILE7900__STATICRR }, - { "RRTILE7901", DVPTR(TILE_RRTILE7901), 0, RRTILE7901__STATICRR }, - { "RRTILE7906", DVPTR(TILE_RRTILE7906), 0, RRTILE7906__STATICRR }, - { "RRTILE7912", DVPTR(TILE_RRTILE7912), 0, RRTILE7912__STATICRR }, - { "RRTILE7913", DVPTR(TILE_RRTILE7913), 0, RRTILE7913__STATICRR }, - { "RRTILE7936", DVPTR(TILE_RRTILE7936), 0, RRTILE7936__STATICRR }, - { "RRTILE8047", DVPTR(TILE_RRTILE8047), 0, RRTILE8047__STATICRR }, { "MULTISWITCH2", DVPTR(TILE_MULTISWITCH2), 0, MULTISWITCH2__STATICRR }, - { "RRTILE8059", DVPTR(TILE_RRTILE8059), 0, RRTILE8059__STATICRR }, - { "RRTILE8060", DVPTR(TILE_RRTILE8060), 0, RRTILE8060__STATICRR }, - { "RRTILE8063", DVPTR(TILE_RRTILE8063), 0, RRTILE8063__STATICRR }, - { "RRTILE8067", DVPTR(TILE_RRTILE8067), 0, RRTILE8067__STATICRR }, - { "RRTILE8076", DVPTR(TILE_RRTILE8076), 0, RRTILE8076__STATICRR }, - { "RRTILE8094", DVPTR(TILE_RRTILE8094), 0, RRTILE8094__STATICRR }, - { "RRTILE8096", DVPTR(TILE_RRTILE8096), 0, RRTILE8096__STATICRR }, - { "RRTILE8099", DVPTR(TILE_RRTILE8099), 0, RRTILE8099__STATICRR }, - { "RRTILE8106", DVPTR(TILE_RRTILE8106), 0, RRTILE8106__STATICRR }, - { "RRTILE8162", DVPTR(TILE_RRTILE8162), 0, RRTILE8162__STATICRR }, - { "RRTILE8163", DVPTR(TILE_RRTILE8163), 0, RRTILE8163__STATICRR }, - { "RRTILE8164", DVPTR(TILE_RRTILE8164), 0, RRTILE8164__STATICRR }, - { "RRTILE8165", DVPTR(TILE_RRTILE8165), 0, RRTILE8165__STATICRR }, - { "RRTILE8166", DVPTR(TILE_RRTILE8166), 0, RRTILE8166__STATICRR }, - { "RRTILE8167", DVPTR(TILE_RRTILE8167), 0, RRTILE8167__STATICRR }, - { "RRTILE8168", DVPTR(TILE_RRTILE8168), 0, RRTILE8168__STATICRR }, - { "RRTILE8192", DVPTR(TILE_RRTILE8192), 0, RRTILE8192__STATICRR }, - { "RRTILE8193", DVPTR(TILE_RRTILE8193), 0, RRTILE8193__STATICRR }, - { "RRTILE8215", DVPTR(TILE_RRTILE8215), 0, RRTILE8215__STATICRR }, - { "RRTILE8216", DVPTR(TILE_RRTILE8216), 0, RRTILE8216__STATICRR }, - { "RRTILE8217", DVPTR(TILE_RRTILE8217), 0, RRTILE8217__STATICRR }, - { "RRTILE8218", DVPTR(TILE_RRTILE8218), 0, RRTILE8218__STATICRR }, - { "RRTILE8220", DVPTR(TILE_RRTILE8220), 0, RRTILE8220__STATICRR }, - { "RRTILE8221", DVPTR(TILE_RRTILE8221), 0, RRTILE8221__STATICRR }, - { "RRTILE8222", DVPTR(TILE_RRTILE8222), 0, RRTILE8222__STATICRR }, - { "RRTILE8223", DVPTR(TILE_RRTILE8223), 0, RRTILE8223__STATICRR }, - { "RRTILE8224", DVPTR(TILE_RRTILE8224), 0, RRTILE8224__STATICRR }, - { "RRTILE8227", DVPTR(TILE_RRTILE8227), 0, RRTILE8227__STATICRR }, - { "RRTILE8312", DVPTR(TILE_RRTILE8312), 0, RRTILE8312__STATICRR }, - { "RRTILE8370", DVPTR(TILE_RRTILE8370), 0, RRTILE8370__STATICRR }, - { "RRTILE8371", DVPTR(TILE_RRTILE8371), 0, RRTILE8371__STATICRR }, - { "RRTILE8372", DVPTR(TILE_RRTILE8372), 0, RRTILE8372__STATICRR }, - { "RRTILE8373", DVPTR(TILE_RRTILE8373), 0, RRTILE8373__STATICRR }, - { "RRTILE8379", DVPTR(TILE_RRTILE8379), 0, RRTILE8379__STATICRR }, - { "RRTILE8380", DVPTR(TILE_RRTILE8380), 0, RRTILE8380__STATICRR }, - { "RRTILE8385", DVPTR(TILE_RRTILE8385), 0, RRTILE8385__STATICRR }, - { "RRTILE8386", DVPTR(TILE_RRTILE8386), 0, RRTILE8386__STATICRR }, - { "RRTILE8387", DVPTR(TILE_RRTILE8387), 0, RRTILE8387__STATICRR }, - { "RRTILE8388", DVPTR(TILE_RRTILE8388), 0, RRTILE8388__STATICRR }, - { "RRTILE8389", DVPTR(TILE_RRTILE8389), 0, RRTILE8389__STATICRR }, - { "RRTILE8390", DVPTR(TILE_RRTILE8390), 0, RRTILE8390__STATICRR }, - { "RRTILE8391", DVPTR(TILE_RRTILE8391), 0, RRTILE8391__STATICRR }, - { "RRTILE8392", DVPTR(TILE_RRTILE8392), 0, RRTILE8392__STATICRR }, - { "RRTILE8394", DVPTR(TILE_RRTILE8394), 0, RRTILE8394__STATICRR }, - { "RRTILE8395", DVPTR(TILE_RRTILE8395), 0, RRTILE8395__STATICRR }, - { "RRTILE8396", DVPTR(TILE_RRTILE8396), 0, RRTILE8396__STATICRR }, - { "RRTILE8397", DVPTR(TILE_RRTILE8397), 0, RRTILE8397__STATICRR }, - { "RRTILE8398", DVPTR(TILE_RRTILE8398), 0, RRTILE8398__STATICRR }, - { "RRTILE8399", DVPTR(TILE_RRTILE8399), 0, RRTILE8399__STATICRR }, - { "RRTILE8423", DVPTR(TILE_RRTILE8423), 0, RRTILE8423__STATICRR }, - { "RRTILE8448", DVPTR(TILE_RRTILE8448), 0, RRTILE8448__STATICRR }, - { "RRTILE8450", DVPTR(TILE_RRTILE8450), 0, RRTILE8450__STATICRR }, { "BOATAMMO", DVPTR(TILE_BOATAMMO), 0, BOATAMMO__STATICRR }, - { "RRTILE8461", DVPTR(TILE_RRTILE8461), 0, RRTILE8461__STATICRR }, - { "RRTILE8462", DVPTR(TILE_RRTILE8462), 0, RRTILE8462__STATICRR }, - { "RRTILE8464", DVPTR(TILE_RRTILE8464), 0, RRTILE8464__STATICRR }, - { "RRTILE8475", DVPTR(TILE_RRTILE8475), 0, RRTILE8475__STATICRR }, - { "RRTILE8487", DVPTR(TILE_RRTILE8487), 0, RRTILE8487__STATICRR }, - { "RRTILE8488", DVPTR(TILE_RRTILE8488), 0, RRTILE8488__STATICRR }, - { "RRTILE8489", DVPTR(TILE_RRTILE8489), 0, RRTILE8489__STATICRR }, - { "RRTILE8490", DVPTR(TILE_RRTILE8490), 0, RRTILE8490__STATICRR }, - { "RRTILE8496", DVPTR(TILE_RRTILE8496), 0, RRTILE8496__STATICRR }, - { "RRTILE8497", DVPTR(TILE_RRTILE8497), 0, RRTILE8497__STATICRR }, - { "RRTILE8498", DVPTR(TILE_RRTILE8498), 0, RRTILE8498__STATICRR }, - { "RRTILE8499", DVPTR(TILE_RRTILE8499), 0, RRTILE8499__STATICRR }, - { "RRTILE8503", DVPTR(TILE_RRTILE8503), 0, RRTILE8503__STATICRR }, - { "RRTILE8525", DVPTR(TILE_RRTILE8525), 0, RRTILE8525__STATICRR }, - { "RRTILE8537", DVPTR(TILE_RRTILE8537), 0, RRTILE8537__STATICRR }, - { "RRTILE8565", DVPTR(TILE_RRTILE8565), 0, RRTILE8565__STATICRR }, - { "RRTILE8567", DVPTR(TILE_RRTILE8567), 0, RRTILE8567__STATICRR }, - { "RRTILE8568", DVPTR(TILE_RRTILE8568), 0, RRTILE8568__STATICRR }, - { "RRTILE8569", DVPTR(TILE_RRTILE8569), 0, RRTILE8569__STATICRR }, - { "RRTILE8570", DVPTR(TILE_RRTILE8570), 0, RRTILE8570__STATICRR }, - { "RRTILE8571", DVPTR(TILE_RRTILE8571), 0, RRTILE8571__STATICRR }, - { "RRTILE8579", DVPTR(TILE_RRTILE8579), 0, RRTILE8579__STATICRR }, - { "RRTILE8588", DVPTR(TILE_RRTILE8588), 0, RRTILE8588__STATICRR }, - { "RRTILE8589", DVPTR(TILE_RRTILE8589), 0, RRTILE8589__STATICRR }, - { "RRTILE8590", DVPTR(TILE_RRTILE8590), 0, RRTILE8590__STATICRR }, - { "RRTILE8591", DVPTR(TILE_RRTILE8591), 0, RRTILE8591__STATICRR }, - { "RRTILE8592", DVPTR(TILE_RRTILE8592), 0, RRTILE8592__STATICRR }, - { "RRTILE8593", DVPTR(TILE_RRTILE8593), 0, RRTILE8593__STATICRR }, - { "RRTILE8594", DVPTR(TILE_RRTILE8594), 0, RRTILE8594__STATICRR }, - { "RRTILE8595", DVPTR(TILE_RRTILE8595), 0, RRTILE8595__STATICRR }, - { "RRTILE8596", DVPTR(TILE_RRTILE8596), 0, RRTILE8596__STATICRR }, - { "RRTILE8598", DVPTR(TILE_RRTILE8598), 0, RRTILE8598__STATICRR }, - { "RRTILE8605", DVPTR(TILE_RRTILE8605), 0, RRTILE8605__STATICRR }, - { "RRTILE8608", DVPTR(TILE_RRTILE8608), 0, RRTILE8608__STATICRR }, - { "RRTILE8609", DVPTR(TILE_RRTILE8609), 0, RRTILE8609__STATICRR }, - { "RRTILE8611", DVPTR(TILE_RRTILE8611), 0, RRTILE8611__STATICRR }, - { "RRTILE8617", DVPTR(TILE_RRTILE8617), 0, RRTILE8617__STATICRR }, - { "RRTILE8618", DVPTR(TILE_RRTILE8618), 0, RRTILE8618__STATICRR }, - { "RRTILE8620", DVPTR(TILE_RRTILE8620), 0, RRTILE8620__STATICRR }, - { "RRTILE8621", DVPTR(TILE_RRTILE8621), 0, RRTILE8621__STATICRR }, - { "RRTILE8622", DVPTR(TILE_RRTILE8622), 0, RRTILE8622__STATICRR }, - { "RRTILE8623", DVPTR(TILE_RRTILE8623), 0, RRTILE8623__STATICRR }, - { "RRTILE8624", DVPTR(TILE_RRTILE8624), 0, RRTILE8624__STATICRR }, - { "RRTILE8640", DVPTR(TILE_RRTILE8640), 0, RRTILE8640__STATICRR }, - { "RRTILE8651", DVPTR(TILE_RRTILE8651), 0, RRTILE8651__STATICRR }, - { "RRTILE8660", DVPTR(TILE_RRTILE8660), 0, RRTILE8660__STATICRR }, - { "RRTILE8677", DVPTR(TILE_RRTILE8677), 0, RRTILE8677__STATICRR }, - { "RRTILE8679", DVPTR(TILE_RRTILE8679), 0, RRTILE8679__STATICRR }, - { "RRTILE8680", DVPTR(TILE_RRTILE8680), 0, RRTILE8680__STATICRR }, - { "RRTILE8681", DVPTR(TILE_RRTILE8681), 0, RRTILE8681__STATICRR }, - { "RRTILE8682", DVPTR(TILE_RRTILE8682), 0, RRTILE8682__STATICRR }, - { "RRTILE8683", DVPTR(TILE_RRTILE8683), 0, RRTILE8683__STATICRR }, - { "RRTILE8704", DVPTR(TILE_RRTILE8704), 0, RRTILE8704__STATICRR }, { "BOULDER", DVPTR(TILE_BOULDER), 0, BOULDER__STATICRR }, { "BOULDER1", DVPTR(TILE_BOULDER1), 0, BOULDER1__STATICRR }, { "TORNADO", DVPTR(TILE_TORNADO), 0, TORNADO__STATICRR }, @@ -2189,45 +1657,13 @@ int32_t TILE_SIGN1 = SIGN1__STATIC; int32_t TILE_SIGN2 = SIGN2__STATIC; int32_t TILE_JURYGUY = JURYGUY__STATIC; -int32_t TILE_RRTILE11 = 0; int32_t TILE_RPG2SPRITE = 0; -int32_t TILE_RRTILE18 = 0; -int32_t TILE_RRTILE19 = 0; -int32_t TILE_RRTILE34 = 0; -int32_t TILE_RRTILE35 = 0; int32_t TILE_DESTRUCTO = 0; -int32_t TILE_RRTILE38 = 0; -int32_t TILE_RRTILE43 = 0; int32_t TILE_GUTMETER = 0; -int32_t TILE_RRTILE63 = 0; -int32_t TILE_RRTILE64 = 0; -int32_t TILE_RRTILE65 = 0; -int32_t TILE_RRTILE66 = 0; -int32_t TILE_RRTILE67 = 0; -int32_t TILE_RRTILE68 = 0; int32_t TILE_SOUNDFX = 0; int32_t TILE_MOTOAMMO = 0; int32_t TILE_UFOBEAM = 0; -int32_t TILE_RRTILE280 = 0; -int32_t TILE_RRTILE281 = 0; -int32_t TILE_RRTILE282 = 0; -int32_t TILE_RRTILE283 = 0; -int32_t TILE_RRTILE285 = 0; -int32_t TILE_RRTILE286 = 0; -int32_t TILE_RRTILE287 = 0; -int32_t TILE_RRTILE288 = 0; -int32_t TILE_RRTILE289 = 0; -int32_t TILE_RRTILE290 = 0; -int32_t TILE_RRTILE291 = 0; -int32_t TILE_RRTILE292 = 0; -int32_t TILE_RRTILE293 = 0; -int32_t TILE_RRTILE295 = 0; -int32_t TILE_RRTILE296 = 0; -int32_t TILE_RRTILE297 = 0; int32_t TILE_CDPLAYER = 0; -int32_t TILE_RRTILE380 = 0; -int32_t TILE_RRTILE403 = 0; -int32_t TILE_RRTILE409 = 0; int32_t TILE_GUTMETER_LIGHT1 = 0; int32_t TILE_GUTMETER_LIGHT2 = 0; int32_t TILE_GUTMETER_LIGHT3 = 0; @@ -2238,525 +1674,27 @@ int32_t TILE_MUD = 0; int32_t TILE_EXPLOSION3 = 0; int32_t TILE_RRTILE1636 = 0; int32_t TILE_WEAPONBAR = 0; -int32_t TILE_RRTILE1752 = 0; int32_t TILE_RPG2 = 0; -int32_t TILE_RRTILE1790 = 0; -int32_t TILE_RRTILE1792 = 0; -int32_t TILE_RRTILE1801 = 0; -int32_t TILE_RRTILE1805 = 0; -int32_t TILE_RRTILE1807 = 0; -int32_t TILE_RRTILE1808 = 0; -int32_t TILE_RRTILE1812 = 0; -int32_t TILE_RRTILE1814 = 0; -int32_t TILE_RRTILE1817 = 0; -int32_t TILE_RRTILE1821 = 0; -int32_t TILE_RRTILE1824 = 0; -int32_t TILE_RRTILE1826 = 0; -int32_t TILE_RRTILE1850 = 0; -int32_t TILE_RRTILE1851 = 0; -int32_t TILE_RRTILE1856 = 0; -int32_t TILE_RRTILE1877 = 0; -int32_t TILE_RRTILE1878 = 0; -int32_t TILE_RRTILE1938 = 0; -int32_t TILE_RRTILE1939 = 0; -int32_t TILE_RRTILE1942 = 0; -int32_t TILE_RRTILE1944 = 0; -int32_t TILE_RRTILE1945 = 0; -int32_t TILE_RRTILE1947 = 0; -int32_t TILE_RRTILE1951 = 0; -int32_t TILE_RRTILE1952 = 0; -int32_t TILE_RRTILE1953 = 0; -int32_t TILE_RRTILE1961 = 0; -int32_t TILE_RRTILE1964 = 0; -int32_t TILE_RRTILE1973 = 0; -int32_t TILE_RRTILE1985 = 0; -int32_t TILE_RRTILE1986 = 0; -int32_t TILE_RRTILE1987 = 0; -int32_t TILE_RRTILE1988 = 0; -int32_t TILE_RRTILE1990 = 0; -int32_t TILE_RRTILE1995 = 0; -int32_t TILE_RRTILE1996 = 0; -int32_t TILE_RRTILE2004 = 0; -int32_t TILE_RRTILE2005 = 0; int32_t TILE_POPCORN = 0; -int32_t TILE_RRTILE2022 = 0; int32_t TILE_LANEPICS = 0; -int32_t TILE_RRTILE2025 = 0; -int32_t TILE_RRTILE2026 = 0; -int32_t TILE_RRTILE2027 = 0; -int32_t TILE_RRTILE2028 = 0; -int32_t TILE_RRTILE2034 = 0; -int32_t TILE_RRTILE2050 = 0; -int32_t TILE_RRTILE2052 = 0; -int32_t TILE_RRTILE2053 = 0; -int32_t TILE_RRTILE2056 = 0; -int32_t TILE_RRTILE2060 = 0; -int32_t TILE_RRTILE2072 = 0; -int32_t TILE_RRTILE2074 = 0; -int32_t TILE_RRTILE2075 = 0; -int32_t TILE_RRTILE2083 = 0; -int32_t TILE_RRTILE2097 = 0; -int32_t TILE_RRTILE2121 = 0; -int32_t TILE_RRTILE2122 = 0; -int32_t TILE_RRTILE2123 = 0; -int32_t TILE_RRTILE2124 = 0; -int32_t TILE_RRTILE2125 = 0; -int32_t TILE_RRTILE2126 = 0; -int32_t TILE_RRTILE2137 = 0; -int32_t TILE_RRTILE2132 = 0; -int32_t TILE_RRTILE2136 = 0; -int32_t TILE_RRTILE2139 = 0; -int32_t TILE_RRTILE2150 = 0; -int32_t TILE_RRTILE2151 = 0; -int32_t TILE_RRTILE2152 = 0; -int32_t TILE_RRTILE2156 = 0; -int32_t TILE_RRTILE2157 = 0; -int32_t TILE_RRTILE2158 = 0; -int32_t TILE_RRTILE2159 = 0; -int32_t TILE_RRTILE2160 = 0; -int32_t TILE_RRTILE2161 = 0; -int32_t TILE_RRTILE2175 = 0; -int32_t TILE_RRTILE2176 = 0; -int32_t TILE_RRTILE2178 = 0; -int32_t TILE_RRTILE2186 = 0; -int32_t TILE_RRTILE2214 = 0; -int32_t TILE_RRTILE2319 = 0; -int32_t TILE_RRTILE2321 = 0; -int32_t TILE_RRTILE2326 = 0; -int32_t TILE_RRTILE2329 = 0; -int32_t TILE_RRTILE2357 = 0; -int32_t TILE_RRTILE2382 = 0; -int32_t TILE_RRTILE2430 = 0; -int32_t TILE_RRTILE2431 = 0; -int32_t TILE_RRTILE2432 = 0; -int32_t TILE_RRTILE2437 = 0; -int32_t TILE_RRTILE2443 = 0; -int32_t TILE_RRTILE2445 = 0; -int32_t TILE_RRTILE2446 = 0; -int32_t TILE_RRTILE2450 = 0; -int32_t TILE_RRTILE2451 = 0; -int32_t TILE_RRTILE2455 = 0; -int32_t TILE_RRTILE2460 = 0; -int32_t TILE_RRTILE2465 = 0; -int32_t TILE_RRTILE2560 = 0; -int32_t TILE_RRTILE2562 = 0; -int32_t TILE_RRTILE2564 = 0; -int32_t TILE_RRTILE2573 = 0; -int32_t TILE_RRTILE2574 = 0; -int32_t TILE_RRTILE2577 = 0; -int32_t TILE_RRTILE2578 = 0; -int32_t TILE_RRTILE2581 = 0; -int32_t TILE_RRTILE2583 = 0; -int32_t TILE_RRTILE2604 = 0; -int32_t TILE_RRTILE2610 = 0; -int32_t TILE_RRTILE2613 = 0; -int32_t TILE_RRTILE2621 = 0; -int32_t TILE_RRTILE2622 = 0; -int32_t TILE_RRTILE2636 = 0; -int32_t TILE_RRTILE2637 = 0; -int32_t TILE_RRTILE2654 = 0; -int32_t TILE_RRTILE2656 = 0; -int32_t TILE_RRTILE2676 = 0; -int32_t TILE_RRTILE2689 = 0; -int32_t TILE_RRTILE2697 = 0; -int32_t TILE_RRTILE2702 = 0; -int32_t TILE_RRTILE2707 = 0; -int32_t TILE_RRTILE2732 = 0; -int32_t TILE_RRTILE2030 = 0; -int32_t TILE_RRTILE2831 = 0; -int32_t TILE_RRTILE2832 = 0; -int32_t TILE_RRTILE2842 = 0; -int32_t TILE_RRTILE2859 = 0; -int32_t TILE_RRTILE2876 = 0; -int32_t TILE_RRTILE2878 = 0; -int32_t TILE_RRTILE2879 = 0; -int32_t TILE_RRTILE2893 = 0; -int32_t TILE_RRTILE2894 = 0; -int32_t TILE_RRTILE2898 = 0; -int32_t TILE_RRTILE2899 = 0; -int32_t TILE_RRTILE2915 = 0; -int32_t TILE_RRTILE2940 = 0; -int32_t TILE_RRTILE2944 = 0; -int32_t TILE_RRTILE2945 = 0; -int32_t TILE_RRTILE2946 = 0; -int32_t TILE_RRTILE2947 = 0; -int32_t TILE_RRTILE2948 = 0; -int32_t TILE_RRTILE2949 = 0; -int32_t TILE_RRTILE2961 = 0; -int32_t TILE_RRTILE2970 = 0; -int32_t TILE_RRTILE2977 = 0; -int32_t TILE_RRTILE2978 = 0; -int32_t TILE_RRTILE2990 = 0; -int32_t TILE_RRTILE3073 = 0; -int32_t TILE_RRTILE3083 = 0; -int32_t TILE_RRTILE3100 = 0; -int32_t TILE_RRTILE3114 = 0; -int32_t TILE_RRTILE3115 = 0; -int32_t TILE_RRTILE3116 = 0; -int32_t TILE_RRTILE3117 = 0; -int32_t TILE_RRTILE3120 = 0; -int32_t TILE_RRTILE3121 = 0; -int32_t TILE_RRTILE3122 = 0; -int32_t TILE_RRTILE3123 = 0; -int32_t TILE_RRTILE3124 = 0; -int32_t TILE_RRTILE3132 = 0; -int32_t TILE_RRTILE3139 = 0; -int32_t TILE_RRTILE3144 = 0; -int32_t TILE_RRTILE3152 = 0; -int32_t TILE_RRTILE3153 = 0; -int32_t TILE_RRTILE3155 = 0; -int32_t TILE_RRTILE3171 = 0; -int32_t TILE_RRTILE3172 = 0; -int32_t TILE_RRTILE3190 = 0; -int32_t TILE_RRTILE3191 = 0; -int32_t TILE_RRTILE3192 = 0; -int32_t TILE_RRTILE3195 = 0; -int32_t TILE_RRTILE3200 = 0; -int32_t TILE_RRTILE3201 = 0; -int32_t TILE_RRTILE3202 = 0; -int32_t TILE_RRTILE3203 = 0; -int32_t TILE_RRTILE3204 = 0; -int32_t TILE_RRTILE3205 = 0; -int32_t TILE_RRTILE3206 = 0; -int32_t TILE_RRTILE3207 = 0; -int32_t TILE_RRTILE3208 = 0; -int32_t TILE_RRTILE3209 = 0; -int32_t TILE_RRTILE3216 = 0; -int32_t TILE_RRTILE3218 = 0; -int32_t TILE_RRTILE3219 = 0; -int32_t TILE_RRTILE3232 = 0; int32_t TILE_SHOTGUNSHELLS = 0; int32_t TILE_CIRCLESTUCK = 0; -int32_t TILE_RRTILE3410 = 0; int32_t TILE_LUMBERBLADE = 0; int32_t TILE_BOWLINGBALLH = 0; int32_t TILE_BOWLINGBALL = 0; int32_t TILE_BOWLINGBALLSPRITE = 0; int32_t TILE_POWDERH = 0; -int32_t TILE_RRTILE3440 = 0; -int32_t TILE_RRTILE3462 = 0; int32_t TILE_OWHIP = 0; int32_t TILE_UWHIP = 0; int32_t TILE_RPGGUN2 = 0; -int32_t TILE_RRTILE3497 = 0; -int32_t TILE_RRTILE3498 = 0; -int32_t TILE_RRTILE3499 = 0; -int32_t TILE_RRTILE3500 = 0; int32_t TILE_SLINGBLADE = 0; -int32_t TILE_RRTILE3584 = 0; -int32_t TILE_RRTILE3586 = 0; -int32_t TILE_RRTILE3587 = 0; -int32_t TILE_RRTILE3600 = 0; -int32_t TILE_RRTILE3631 = 0; -int32_t TILE_RRTILE3635 = 0; -int32_t TILE_RRTILE3637 = 0; -int32_t TILE_RRTILE3643 = 0; -int32_t TILE_RRTILE3647 = 0; -int32_t TILE_RRTILE3652 = 0; -int32_t TILE_RRTILE3653 = 0; -int32_t TILE_RRTILE3668 = 0; -int32_t TILE_RRTILE3671 = 0; -int32_t TILE_RRTILE3673 = 0; -int32_t TILE_RRTILE3677 = 0; -int32_t TILE_RRTILE3684 = 0; -int32_t TILE_RRTILE3708 = 0; -int32_t TILE_RRTILE3714 = 0; -int32_t TILE_RRTILE3716 = 0; -int32_t TILE_RRTILE3720 = 0; -int32_t TILE_RRTILE3723 = 0; -int32_t TILE_RRTILE3725 = 0; -int32_t TILE_RRTILE3737 = 0; -int32_t TILE_RRTILE3754 = 0; -int32_t TILE_RRTILE3762 = 0; -int32_t TILE_RRTILE3763 = 0; -int32_t TILE_RRTILE3764 = 0; -int32_t TILE_RRTILE3765 = 0; -int32_t TILE_RRTILE3767 = 0; -int32_t TILE_RRTILE3773 = 0; -int32_t TILE_RRTILE3774 = 0; -int32_t TILE_RRTILE3793 = 0; -int32_t TILE_RRTILE3795 = 0; -int32_t TILE_RRTILE3804 = 0; -int32_t TILE_RRTILE3814 = 0; -int32_t TILE_RRTILE3815 = 0; -int32_t TILE_RRTILE3819 = 0; -int32_t TILE_RRTILE3827 = 0; -int32_t TILE_RRTILE3837 = 0; -int32_t TILE_RRTILE5014 = 0; -int32_t TILE_RRTILE5016 = 0; -int32_t TILE_RRTILE5017 = 0; -int32_t TILE_RRTILE5018 = 0; -int32_t TILE_RRTILE5019 = 0; -int32_t TILE_RRTILE5020 = 0; -int32_t TILE_RRTILE5021 = 0; -int32_t TILE_RRTILE5022 = 0; -int32_t TILE_RRTILE5023 = 0; -int32_t TILE_RRTILE5024 = 0; -int32_t TILE_RRTILE5025 = 0; -int32_t TILE_RRTILE5026 = 0; -int32_t TILE_RRTILE5027 = 0; -int32_t TILE_RRTILE5029 = 0; -int32_t TILE_RRTILE5030 = 0; -int32_t TILE_RRTILE5031 = 0; -int32_t TILE_RRTILE5032 = 0; -int32_t TILE_RRTILE5033 = 0; -int32_t TILE_RRTILE5034 = 0; -int32_t TILE_RRTILE5035 = 0; -int32_t TILE_RRTILE5036 = 0; -int32_t TILE_RRTILE5037 = 0; -int32_t TILE_RRTILE5038 = 0; -int32_t TILE_RRTILE5039 = 0; -int32_t TILE_RRTILE5040 = 0; -int32_t TILE_RRTILE5041 = 0; -int32_t TILE_RRTILE5043 = 0; -int32_t TILE_RRTILE5044 = 0; -int32_t TILE_RRTILE5045 = 0; -int32_t TILE_RRTILE5046 = 0; -int32_t TILE_RRTILE5047 = 0; -int32_t TILE_RRTILE5048 = 0; -int32_t TILE_RRTILE5049 = 0; -int32_t TILE_RRTILE5050 = 0; -int32_t TILE_RRTILE5051 = 0; -int32_t TILE_RRTILE5052 = 0; -int32_t TILE_RRTILE5053 = 0; -int32_t TILE_RRTILE5054 = 0; -int32_t TILE_RRTILE5055 = 0; -int32_t TILE_RRTILE5056 = 0; -int32_t TILE_RRTILE5057 = 0; -int32_t TILE_RRTILE5058 = 0; -int32_t TILE_RRTILE5059 = 0; -int32_t TILE_RRTILE5061 = 0; -int32_t TILE_RRTILE5062 = 0; -int32_t TILE_RRTILE5063 = 0; -int32_t TILE_RRTILE5064 = 0; -int32_t TILE_RRTILE5065 = 0; -int32_t TILE_RRTILE5066 = 0; -int32_t TILE_RRTILE5067 = 0; -int32_t TILE_RRTILE5068 = 0; -int32_t TILE_RRTILE5069 = 0; -int32_t TILE_RRTILE5070 = 0; -int32_t TILE_RRTILE5071 = 0; -int32_t TILE_RRTILE5072 = 0; -int32_t TILE_RRTILE5073 = 0; -int32_t TILE_RRTILE5074 = 0; -int32_t TILE_RRTILE5075 = 0; -int32_t TILE_RRTILE5076 = 0; -int32_t TILE_RRTILE5077 = 0; -int32_t TILE_RRTILE5078 = 0; -int32_t TILE_RRTILE5079 = 0; -int32_t TILE_RRTILE5080 = 0; -int32_t TILE_RRTILE5081 = 0; -int32_t TILE_RRTILE5082 = 0; -int32_t TILE_RRTILE5083 = 0; -int32_t TILE_RRTILE5084 = 0; -int32_t TILE_RRTILE5085 = 0; -int32_t TILE_RRTILE5086 = 0; -int32_t TILE_RRTILE5087 = 0; -int32_t TILE_RRTILE5088 = 0; -int32_t TILE_RRTILE5090 = 0; -int32_t TILE_RRTILE6144 = 0; -int32_t TILE_RRTILE7110 = 0; -int32_t TILE_RRTILE7111 = 0; -int32_t TILE_RRTILE7112 = 0; -int32_t TILE_RRTILE7113 = 0; int32_t TILE_MOTOGUN = 0; -int32_t TILE_RRTILE7169 = 0; int32_t TILE_MOTOHIT = 0; int32_t TILE_BOATHIT = 0; -int32_t TILE_RRTILE7184 = 0; -int32_t TILE_RRTILE7190 = 0; -int32_t TILE_RRTILE7191 = 0; -int32_t TILE_RRTILE7213 = 0; -int32_t TILE_RRTILE7219 = 0; int32_t TILE_EMPTYBIKE = 0; int32_t TILE_EMPTYBOAT = 0; -int32_t TILE_RRTILE7424 = 0; -int32_t TILE_RRTILE7430 = 0; -int32_t TILE_RRTILE7433 = 0; -int32_t TILE_RRTILE7441 = 0; -int32_t TILE_RRTILE7547 = 0; -int32_t TILE_RRTILE7467 = 0; -int32_t TILE_RRTILE7469 = 0; -int32_t TILE_RRTILE7470 = 0; -int32_t TILE_RRTILE7475 = 0; -int32_t TILE_RRTILE7478 = 0; -int32_t TILE_RRTILE7505 = 0; -int32_t TILE_RRTILE7506 = 0; -int32_t TILE_RRTILE7534 = 0; -int32_t TILE_RRTILE7540 = 0; -int32_t TILE_RRTILE7533 = 0; -int32_t TILE_RRTILE7545 = 0; -int32_t TILE_RRTILE7552 = 0; -int32_t TILE_RRTILE7553 = 0; -int32_t TILE_RRTILE7554 = 0; -int32_t TILE_RRTILE7555 = 0; -int32_t TILE_RRTILE7557 = 0; -int32_t TILE_RRTILE7558 = 0; -int32_t TILE_RRTILE7559 = 0; -int32_t TILE_RRTILE7561 = 0; -int32_t TILE_RRTILE7566 = 0; -int32_t TILE_RRTILE7568 = 0; -int32_t TILE_RRTILE7574 = 0; -int32_t TILE_RRTILE7575 = 0; -int32_t TILE_RRTILE7576 = 0; -int32_t TILE_RRTILE7578 = 0; -int32_t TILE_RRTILE7579 = 0; -int32_t TILE_RRTILE7580 = 0; -int32_t TILE_RRTILE7595 = 0; -int32_t TILE_RRTILE7629 = 0; -int32_t TILE_RRTILE7636 = 0; -int32_t TILE_RRTILE7638 = 0; -int32_t TILE_RRTILE7640 = 0; -int32_t TILE_RRTILE7644 = 0; -int32_t TILE_RRTILE7646 = 0; -int32_t TILE_RRTILE7648 = 0; -int32_t TILE_RRTILE7650 = 0; -int32_t TILE_RRTILE7653 = 0; -int32_t TILE_RRTILE7655 = 0; -int32_t TILE_RRTILE7657 = 0; -int32_t TILE_RRTILE7659 = 0; -int32_t TILE_RRTILE7691 = 0; -int32_t TILE_RRTILE7694 = 0; -int32_t TILE_RRTILE7696 = 0; -int32_t TILE_RRTILE7697 = 0; -int32_t TILE_RRTILE7700 = 0; -int32_t TILE_RRTILE7702 = 0; -int32_t TILE_RRTILE7704 = 0; -int32_t TILE_RRTILE7705 = 0; -int32_t TILE_RRTILE7711 = 0; -int32_t TILE_RRTILE7716 = 0; -int32_t TILE_RRTILE7756 = 0; -int32_t TILE_RRTILE7768 = 0; -int32_t TILE_RRTILE7806 = 0; -int32_t TILE_RRTILE7820 = 0; -int32_t TILE_RRTILE7859 = 0; -int32_t TILE_RRTILE7870 = 0; -int32_t TILE_RRTILE7873 = 0; -int32_t TILE_RRTILE7875 = 0; -int32_t TILE_RRTILE7876 = 0; -int32_t TILE_RRTILE7879 = 0; -int32_t TILE_RRTILE7881 = 0; -int32_t TILE_RRTILE7883 = 0; -int32_t TILE_RRTILE7885 = 0; -int32_t TILE_RRTILE7886 = 0; -int32_t TILE_RRTILE7887 = 0; -int32_t TILE_RRTILE7888 = 0; -int32_t TILE_RRTILE7889 = 0; -int32_t TILE_RRTILE7890 = 0; -int32_t TILE_RRTILE7900 = 0; -int32_t TILE_RRTILE7901 = 0; -int32_t TILE_RRTILE7906 = 0; -int32_t TILE_RRTILE7912 = 0; -int32_t TILE_RRTILE7913 = 0; -int32_t TILE_RRTILE7936 = 0; -int32_t TILE_RRTILE8047 = 0; int32_t TILE_MULTISWITCH2 = 0; -int32_t TILE_RRTILE8059 = 0; -int32_t TILE_RRTILE8060 = 0; -int32_t TILE_RRTILE8063 = 0; -int32_t TILE_RRTILE8067 = 0; -int32_t TILE_RRTILE8076 = 0; -int32_t TILE_RRTILE8094 = 0; -int32_t TILE_RRTILE8096 = 0; -int32_t TILE_RRTILE8099 = 0; -int32_t TILE_RRTILE8106 = 0; -int32_t TILE_RRTILE8162 = 0; -int32_t TILE_RRTILE8163 = 0; -int32_t TILE_RRTILE8164 = 0; -int32_t TILE_RRTILE8165 = 0; -int32_t TILE_RRTILE8166 = 0; -int32_t TILE_RRTILE8167 = 0; -int32_t TILE_RRTILE8168 = 0; -int32_t TILE_RRTILE8192 = 0; -int32_t TILE_RRTILE8193 = 0; -int32_t TILE_RRTILE8215 = 0; -int32_t TILE_RRTILE8216 = 0; -int32_t TILE_RRTILE8217 = 0; -int32_t TILE_RRTILE8218 = 0; -int32_t TILE_RRTILE8220 = 0; -int32_t TILE_RRTILE8221 = 0; -int32_t TILE_RRTILE8222 = 0; -int32_t TILE_RRTILE8223 = 0; -int32_t TILE_RRTILE8224 = 0; -int32_t TILE_RRTILE8227 = 0; -int32_t TILE_RRTILE8312 = 0; -int32_t TILE_RRTILE8370 = 0; -int32_t TILE_RRTILE8371 = 0; -int32_t TILE_RRTILE8372 = 0; -int32_t TILE_RRTILE8373 = 0; -int32_t TILE_RRTILE8379 = 0; -int32_t TILE_RRTILE8380 = 0; -int32_t TILE_RRTILE8385 = 0; -int32_t TILE_RRTILE8386 = 0; -int32_t TILE_RRTILE8387 = 0; -int32_t TILE_RRTILE8388 = 0; -int32_t TILE_RRTILE8389 = 0; -int32_t TILE_RRTILE8390 = 0; -int32_t TILE_RRTILE8391 = 0; -int32_t TILE_RRTILE8392 = 0; -int32_t TILE_RRTILE8394 = 0; -int32_t TILE_RRTILE8395 = 0; -int32_t TILE_RRTILE8396 = 0; -int32_t TILE_RRTILE8397 = 0; -int32_t TILE_RRTILE8398 = 0; -int32_t TILE_RRTILE8399 = 0; -int32_t TILE_RRTILE8423 = 0; -int32_t TILE_RRTILE8448 = 0; -int32_t TILE_RRTILE8450 = 0; int32_t TILE_BOATAMMO = 0; -int32_t TILE_RRTILE8461 = 0; -int32_t TILE_RRTILE8462 = 0; -int32_t TILE_RRTILE8464 = 0; -int32_t TILE_RRTILE8475 = 0; -int32_t TILE_RRTILE8487 = 0; -int32_t TILE_RRTILE8488 = 0; -int32_t TILE_RRTILE8489 = 0; -int32_t TILE_RRTILE8490 = 0; -int32_t TILE_RRTILE8496 = 0; -int32_t TILE_RRTILE8497 = 0; -int32_t TILE_RRTILE8498 = 0; -int32_t TILE_RRTILE8499 = 0; -int32_t TILE_RRTILE8503 = 0; -int32_t TILE_RRTILE8525 = 0; -int32_t TILE_RRTILE8537 = 0; -int32_t TILE_RRTILE8565 = 0; -int32_t TILE_RRTILE8567 = 0; -int32_t TILE_RRTILE8568 = 0; -int32_t TILE_RRTILE8569 = 0; -int32_t TILE_RRTILE8570 = 0; -int32_t TILE_RRTILE8571 = 0; -int32_t TILE_RRTILE8579 = 0; -int32_t TILE_RRTILE8588 = 0; -int32_t TILE_RRTILE8589 = 0; -int32_t TILE_RRTILE8590 = 0; -int32_t TILE_RRTILE8591 = 0; -int32_t TILE_RRTILE8592 = 0; -int32_t TILE_RRTILE8593 = 0; -int32_t TILE_RRTILE8594 = 0; -int32_t TILE_RRTILE8595 = 0; -int32_t TILE_RRTILE8596 = 0; -int32_t TILE_RRTILE8598 = 0; -int32_t TILE_RRTILE8605 = 0; -int32_t TILE_RRTILE8608 = 0; -int32_t TILE_RRTILE8609 = 0; -int32_t TILE_RRTILE8611 = 0; -int32_t TILE_RRTILE8617 = 0; -int32_t TILE_RRTILE8618 = 0; -int32_t TILE_RRTILE8620 = 0; -int32_t TILE_RRTILE8621 = 0; -int32_t TILE_RRTILE8622 = 0; -int32_t TILE_RRTILE8623 = 0; -int32_t TILE_RRTILE8624 = 0; -int32_t TILE_RRTILE8640 = 0; -int32_t TILE_RRTILE8651 = 0; -int32_t TILE_RRTILE8660 = 0; -int32_t TILE_RRTILE8677 = 0; -int32_t TILE_RRTILE8679 = 0; -int32_t TILE_RRTILE8680 = 0; -int32_t TILE_RRTILE8681 = 0; -int32_t TILE_RRTILE8682 = 0; -int32_t TILE_RRTILE8683 = 0; -int32_t TILE_RRTILE8704 = 0; int32_t TILE_BOULDER = 0; int32_t TILE_BOULDER1 = 0; int32_t TILE_TORNADO = 0; diff --git a/source/games/duke/src/zz_savegame.cpp b/source/games/duke/src/zz_savegame.cpp index cd41b0920..5621966ae 100644 --- a/source/games/duke/src/zz_savegame.cpp +++ b/source/games/duke/src/zz_savegame.cpp @@ -1011,16 +1011,6 @@ int32_t sv_saveandmakesnapshot(FileWriter &fil, int8_t spot, bool isAutoSave) // write header -#if 0 // not usable anymore - if (spot >= 0 && tileData(TILE_SAVESHOT)) - { - auto fw = WriteSavegameChunk("screenshot.dat"); - fw->Write(tileData(TILE_SAVESHOT), 320*200); - - } -#endif - - if (spot >= 0) { // savegame diff --git a/source/games/duke/src/zz_sbar.cpp b/source/games/duke/src/zz_sbar.cpp index 54dd40cb2..1029d010f 100644 --- a/source/games/duke/src/zz_sbar.cpp +++ b/source/games/duke/src/zz_sbar.cpp @@ -121,7 +121,7 @@ public: } else { - ammo_sprites = { -1, TILE_AMMO, TILE_SHOTGUNAMMO, TILE_BATTERYAMMO, TILE_HBOMBAMMO, TILE_HBOMBAMMO, TILE_RRTILE43, TILE_DEVISTATORAMMO, TILE_TRIPBOMBSPRITE, TILE_GROWSPRITEICON, TILE_HBOMBAMMO, -1, + ammo_sprites = { -1, TILE_AMMO, TILE_SHOTGUNAMMO, TILE_BATTERYAMMO, TILE_HBOMBAMMO, TILE_HBOMBAMMO, 43/*TILE_RRTILE43*/, TILE_DEVISTATORAMMO, TILE_TRIPBOMBSPRITE, TILE_GROWSPRITEICON, TILE_HBOMBAMMO, -1, TILE_BOWLINGBALLSPRITE, TILE_MOTOAMMO, TILE_BOATAMMO, -1, TILE_RPG2SPRITE }; } } @@ -877,7 +877,7 @@ void G_DrawBackground(void) return; } - auto tex = tileGetTexture((g_gameType & GAMEFLAG_RRRA) ? TILE_RRTILE7629 : TILE_BIGHOLE); + auto tex = tileGetTexture((g_gameType & GAMEFLAG_RRRA) ? /*TILE_RRTILE*/7629 : TILE_BIGHOLE); if (tex != nullptr && tex->isValid()) { if (windowxy1.y > 0)