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Use RDTSC equivalent on AARCH64.

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This commit is contained in:
Marisa Kirisame 2022-03-25 17:01:39 +01:00
parent 196d2efc86
commit eeb67bcec3
2 changed files with 16 additions and 6 deletions
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10
src/common/engine/stats.h
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@ -76,8 +76,9 @@ inline uint64_t rdtsc()
while (upper != temp);
return (static_cast<unsigned long long>(upper) << 32) | lower;
#elif defined __aarch64__
// TODO: Implement and test on ARM64
return 0;
uint64_t vct;
asm volatile("mrs %0, cntvct_el0":"=r"(vct));
return vct;
#elif defined __i386__
if (CPU.bRDTSC)
{
@ -192,8 +193,9 @@ inline uint64_t rdtsc()
while (upper != temp);
return (static_cast<unsigned long long>(upper) << 32) | lower;
#elif defined __aarch64__
// TODO: Implement and test on ARM64
return 0;
uint64_t vct;
asm volatile("mrs %0, cntvct_el0":"=r"(vct));
return vct;
#elif defined __i386__ // i386
if (CPU.bRDTSC)
{

10
src/common/platform/posix/sdl/i_system.cpp
View file

@ -144,7 +144,15 @@ void CalculateCPUSpeed()
{
PerfAvailable = false;
PerfToMillisec = PerfToSec = 0.;
#ifdef __linux__
#ifdef __aarch64__
// [MK] on aarch64 rather than having to calculate cpu speed, there is
// already an independent frequency for the perf timer
uint64_t frq;
asm volatile("mrs %0, cntfrq_el0":"=r"(frq));
PerfAvailable = true;
PerfToSec = 1./frq;
PerfToMillisec = PerfToSec*1000.;
#elif defined(__linux__)
// [MK] read from perf values if we can
struct perf_event_attr pe;
memset(&pe,0,sizeof(struct perf_event_attr));