mirror of https://github.com/ZDoom/gzdoom.git
- added detection of more x86 extended CPU instructions
Replaced report of 3DNow support with recent fancy CPU instructions
This commit is contained in:
alexey.lysiuk
parent
6d47d79e22
commit
74685a1360
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@ -58,18 +58,11 @@ FString DumpCPUInfo(const CPUInfo *cpu)
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#ifdef __GNUC__
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#if defined(__i386__) && defined(__PIC__)
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// %ebx may by the PIC register. */
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#define __cpuid(output, func) \
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__asm__ __volatile__("xchgl\t%%ebx, %1\n\t" \
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"cpuid\n\t" \
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"xchgl\t%%ebx, %1\n\t" \
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: "=a" ((output)[0]), "=r" ((output)[1]), "=c" ((output)[2]), "=d" ((output)[3]) \
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: "a" (func));
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#else
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#define __cpuid(output, func) __asm__ __volatile__("cpuid" : "=a" ((output)[0]),\
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"=b" ((output)[1]), "=c" ((output)[2]), "=d" ((output)[3]) : "a" (func));
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#endif
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#define __cpuidex(output, func, subfunc) \
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__asm__ __volatile__("cpuid" \
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: "=a" ((output)[0]), "=b" ((output)[1]), "=c" ((output)[2]), "=d" ((output)[3]) \
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: "a" (func), "c" (subfunc));
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#define __cpuid(output, func) __cpuidex(output, func, 0)
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#endif
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void CheckCPUID(CPUInfo *cpu)
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@ -83,6 +76,7 @@ void CheckCPUID(CPUInfo *cpu)
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// Get vendor ID
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__cpuid(foo, 0);
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const int maxid = foo[0];
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cpu->dwVendorID[0] = foo[1];
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cpu->dwVendorID[1] = foo[3];
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cpu->dwVendorID[2] = foo[2];
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@ -154,6 +148,17 @@ void CheckCPUID(CPUInfo *cpu)
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cpu->FeatureFlags[3] = foo[3]; // AMD feature flags
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}
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}
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if (maxid >= 7)
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{
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__cpuidex(foo, 7, 0);
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cpu->FeatureFlags[4] = foo[1];
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cpu->FeatureFlags[5] = foo[2];
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cpu->FeatureFlags[6] = foo[3];
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__cpuidex(foo, 7, 1);
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cpu->FeatureFlags[7] = foo[0];
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}
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}
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FString DumpCPUInfo(const CPUInfo *cpu)
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@ -208,10 +213,12 @@ FString DumpCPUInfo(const CPUInfo *cpu)
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if (cpu->bSSE41) out += (" SSE4.1");
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if (cpu->bSSE42) out += (" SSE4.2");
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if (cpu->bAVX) out += (" AVX");
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if (cpu->bAVX2) out += (" AVX2");
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if (cpu->bAVX512_F) out += (" AVX512");
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if (cpu->bF16C) out += (" F16C");
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if (cpu->bFMA3) out += (" FMA3");
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if (cpu->b3DNow) out += (" 3DNow!");
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if (cpu->b3DNowPlus) out += (" 3DNow!+");
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if (cpu->bBMI1) out += (" BMI1");
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if (cpu->bBMI2) out += (" BMI2");
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if (cpu->HyperThreading) out += (" HyperThreading");
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out += ("\n");
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}
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@ -48,7 +48,7 @@ struct CPUInfo // 92 bytes
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uint32_t bCX16:1;
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uint32_t bXTPR:1;
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uint32_t bPDCM:1;
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uint32_t Reverved1:1;
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uint32_t bReverved1:1;
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uint32_t bPCID:1;
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uint32_t bDCA:1;
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uint32_t bSSE41:1;
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@ -75,7 +75,7 @@ struct CPUInfo // 92 bytes
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uint32_t bMCE:1;
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uint32_t bCX8:1;
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uint32_t bAPIC:1;
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uint32_t bReserved1:1;
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uint32_t bReserved2:1;
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uint32_t bSEP:1;
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uint32_t bMTRR:1;
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uint32_t bPGE:1;
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@ -85,7 +85,7 @@ struct CPUInfo // 92 bytes
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uint32_t bPSE36:1;
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uint32_t bPSN:1;
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uint32_t bCFLUSH:1;
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uint32_t bReserved2:1;
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uint32_t bReserved3:1;
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uint32_t bDS:1;
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uint32_t bACPI:1;
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uint32_t bMMX:1;
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@ -95,7 +95,7 @@ struct CPUInfo // 92 bytes
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uint32_t bSS:1;
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uint32_t bHTT:1;
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uint32_t bTM:1;
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uint32_t bReserved3:1;
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uint32_t bReserved4:1;
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uint32_t bPBE:1;
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uint32_t DontCare2:22;
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@ -104,8 +104,107 @@ struct CPUInfo // 92 bytes
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uint32_t DontCare3:6;
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uint32_t b3DNowPlus:1;
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uint32_t b3DNow:1;
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uint32_t bFSGSBASE:1;
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uint32_t bIA32_TSC_ADJUST:1;
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uint32_t bSGX:1;
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uint32_t bBMI1:1;
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uint32_t bHLE:1;
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uint32_t bAVX2:1;
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uint32_t bFDP_EXCPTN_ONLY:1;
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uint32_t bSMEP:1;
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uint32_t bBMI2:1;
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uint32_t bERMS:1;
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uint32_t bINVPCID:1;
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uint32_t bRTM:1;
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uint32_t bPQM:1;
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uint32_t bFPU_CS_DS:1;
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uint32_t bMPX:1;
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uint32_t bPQE:1;
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uint32_t bAVX512_F:1;
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uint32_t bAVX512_DQ:1;
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uint32_t bRDSEED:1;
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uint32_t bADX:1;
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uint32_t bSMAP:1;
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uint32_t bAVX512_IFMA:1;
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uint32_t bPCOMMIT:1;
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uint32_t bCLFLUSHOPT:1;
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uint32_t bCLWB:1;
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uint32_t bINTEL_PT:1;
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uint32_t bAVX512_PF:1;
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uint32_t bAVX512_ER:1;
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uint32_t bAVX512_CD:1;
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uint32_t bSHA:1;
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uint32_t bAVX512_BW:1;
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uint32_t bAVX512_VL:1;
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uint32_t bPREFETCHWT1:1;
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uint32_t bAVX512_VBMI:1;
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uint32_t bUMIP:1;
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uint32_t bPKU:1;
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uint32_t bOSPKE:1;
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uint32_t bWAITPKG:1;
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uint32_t bAVX512_VBMI2:1;
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uint32_t bCET_SS:1;
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uint32_t bGFNI:1;
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uint32_t bVAES:1;
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uint32_t bVPCLMULQDQ:1;
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uint32_t bAVX512_VNNI:1;
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uint32_t bAVX512_BITALG:1;
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uint32_t bReserved5:1;
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uint32_t bAVX512_VPOPCNTDQ:1;
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uint32_t bReserved6:1;
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uint32_t b5L_PAGING:1;
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uint32_t MAWAU:5;
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uint32_t bRDPID:1;
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uint32_t bReserved7:1;
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uint32_t bReserved8:1;
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uint32_t bCLDEMOTE:1;
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uint32_t bReserved9:1;
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uint32_t bMOVDIRI:1;
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uint32_t bMOVDIR64B:1;
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uint32_t bENQCMD:1;
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uint32_t bSGX_LC:1;
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uint32_t bPKS:1;
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uint32_t bReserved10:1;
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uint32_t bReserved11:1;
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uint32_t bAVX512_4VNNIW:1;
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uint32_t bAVX512_4FMAPS:1;
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uint32_t bFSRM:1;
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uint32_t bReserved12:1;
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uint32_t bReserved13:1;
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uint32_t bReserved14:1;
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uint32_t bAVX512_VP2INTERSECT:1;
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uint32_t bSRBDS_CTRL:1;
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uint32_t bMD_CLEAR:1;
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uint32_t bReserved15:1;
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uint32_t bReserved16:1;
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uint32_t bTSX_FORCE_ABORT:1;
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uint32_t bSERIALIZE:1;
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uint32_t bHYBRID:1;
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uint32_t bTSXLDTRK:1;
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uint32_t bReserved17:1;
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uint32_t bPCONFIG:1;
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uint32_t bLBR:1;
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uint32_t bCET_IBT:1;
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uint32_t bReserved18:1;
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uint32_t bAMX_BF16:1;
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uint32_t bReserved19:1;
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uint32_t bAMX_TILE:1;
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uint32_t bAMX_INT8:1;
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uint32_t bIBRS_IBPB:1;
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uint32_t bSTIBP:1;
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uint32_t bL1D_FLUSH:1;
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uint32_t bIA32_ARCH_CAPABILITIES:1;
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uint32_t bIA32_CORE_CAPABILITIES:1;
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uint32_t bSSBD:1;
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uint32_t DontCare4:5;
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uint32_t bAVX512_BF16:1;
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uint32_t DontCare5:26;
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};
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uint32_t FeatureFlags[4];
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uint32_t FeatureFlags[8];
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};
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uint8_t AMDStepping;
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