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Merge pull request #968 from devnexen/riscv_build_fix

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cpu pause instruction for RISV-64 compatible gcc/clang.
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Yamagi 2023-02-04 17:41:09 +01:00 committed by GitHub
commit 6c6aa62032
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src/common/frame.c
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@ -95,6 +95,8 @@ static YQ2_ATTR_INLINE void Sys_CpuPause(void)
asm volatile("yield");
#elif defined(__powerpc__) || defined(__powerpc64__)
asm volatile("or 27,27,27");
#elif defined(__riscv) && __riscv_xlen == 64
asm volatile(".insn i 0x0F, 0, x0, x0, 0x010");
#endif
#elif defined(_MSC_VER)
#if defined(_M_IX86) || defined(_M_X64)