diff --git a/include/QF/Vulkan/barrier.h b/include/QF/Vulkan/barrier.h
index 0a6d78af1..a28e07817 100644
--- a/include/QF/Vulkan/barrier.h
+++ b/include/QF/Vulkan/barrier.h
@@ -30,6 +30,12 @@ enum {
 	qfv_BB_TransferWrite_to_VertexAttrRead,
 	qfv_BB_TransferWrite_to_IndexRead,
 	qfv_BB_TransferWrite_to_UniformRead,
+	qfv_BB_ShaderRW_to_ShaderRO,
+	qfv_BB_ShaderRW_to_ShaderRO_VA,
+	qfv_BB_ShaderRO_to_ShaderWrite,
+	qfv_BB_ShaderRO_VA_to_ShaderWrite,
+	qfv_BB_ShaderWrite_to_ShaderRO,
+	qfv_BB_ShaderWrite_to_ShaderRW,
 };
 
 extern const qfv_imagebarrier_t imageBarriers[];
diff --git a/libs/video/renderer/vulkan/barrier.c b/libs/video/renderer/vulkan/barrier.c
index 2ab04d423..7c4f6b788 100644
--- a/libs/video/renderer/vulkan/barrier.c
+++ b/libs/video/renderer/vulkan/barrier.c
@@ -165,4 +165,66 @@ const qfv_bufferbarrier_t bufferBarriers[] = {
 			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
 		},
 	},
+	[qfv_BB_ShaderRW_to_ShaderRO] = {
+		.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.barrier = {
+			VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
+			VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
+			VK_ACCESS_SHADER_READ_BIT,
+			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
+		},
+	},
+	[qfv_BB_ShaderRW_to_ShaderRO_VA] = {
+		.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.dstStages = VK_PIPELINE_STAGE_VERTEX_INPUT_BIT
+					| VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.barrier = {
+			VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
+			VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
+			VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
+			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
+		},
+	},
+	[qfv_BB_ShaderRO_to_ShaderWrite] = {
+		.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.barrier = {
+			VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
+			VK_ACCESS_SHADER_READ_BIT,
+			VK_ACCESS_SHADER_WRITE_BIT,
+			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
+		},
+	},
+	[qfv_BB_ShaderRO_VA_to_ShaderWrite] = {
+		.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT
+					| VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
+		.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.barrier = {
+			VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
+			VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
+			VK_ACCESS_SHADER_WRITE_BIT,
+			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
+		},
+	},
+	[qfv_BB_ShaderWrite_to_ShaderRO] = {
+		.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.barrier = {
+			VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
+			VK_ACCESS_SHADER_WRITE_BIT,
+			VK_ACCESS_SHADER_READ_BIT,
+			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
+		},
+	},
+	[qfv_BB_ShaderWrite_to_ShaderRW] = {
+		.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
+		.barrier = {
+			VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
+			VK_ACCESS_SHADER_WRITE_BIT,
+			VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
+			VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
+		},
+	},
 };