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[vulkan] And a bunch of buffer barrier transitions

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These seem to be the most likely ones for compute shaders (some based on
my ideas for particles).
This commit is contained in:
Bill Currie 2021-12-16 23:02:16 +09:00
parent 7901f87960
commit e0af6541e6
2 changed files with 68 additions and 0 deletions
include/QF/Vulkan
barrier.h
libs/video/renderer/vulkan
barrier.c

6
include/QF/Vulkan/barrier.h
View file

@ -30,6 +30,12 @@ enum {
qfv_BB_TransferWrite_to_VertexAttrRead,
qfv_BB_TransferWrite_to_IndexRead,
qfv_BB_TransferWrite_to_UniformRead,
qfv_BB_ShaderRW_to_ShaderRO,
qfv_BB_ShaderRW_to_ShaderRO_VA,
qfv_BB_ShaderRO_to_ShaderWrite,
qfv_BB_ShaderRO_VA_to_ShaderWrite,
qfv_BB_ShaderWrite_to_ShaderRO,
qfv_BB_ShaderWrite_to_ShaderRW,
};
extern const qfv_imagebarrier_t imageBarriers[];

62
libs/video/renderer/vulkan/barrier.c
View file

@ -165,4 +165,66 @@ const qfv_bufferbarrier_t bufferBarriers[] = {
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
[qfv_BB_ShaderRW_to_ShaderRO] = {
.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.barrier = {
VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
VK_ACCESS_SHADER_READ_BIT,
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
[qfv_BB_ShaderRW_to_ShaderRO_VA] = {
.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.dstStages = VK_PIPELINE_STAGE_VERTEX_INPUT_BIT
| VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.barrier = {
VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
[qfv_BB_ShaderRO_to_ShaderWrite] = {
.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.barrier = {
VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
VK_ACCESS_SHADER_READ_BIT,
VK_ACCESS_SHADER_WRITE_BIT,
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
[qfv_BB_ShaderRO_VA_to_ShaderWrite] = {
.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT
| VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.barrier = {
VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
VK_ACCESS_SHADER_WRITE_BIT,
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
[qfv_BB_ShaderWrite_to_ShaderRO] = {
.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.barrier = {
VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
VK_ACCESS_SHADER_WRITE_BIT,
VK_ACCESS_SHADER_READ_BIT,
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
[qfv_BB_ShaderWrite_to_ShaderRW] = {
.srcStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.dstStages = VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT,
.barrier = {
VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
VK_ACCESS_SHADER_WRITE_BIT,
VK_ACCESS_SHADER_READ_BIT | VK_ACCESS_SHADER_WRITE_BIT,
VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
},
},
};