mirror of
https://git.code.sf.net/p/quake/quakeforge
synced 2024-11-10 15:22:04 +00:00
[vulkan] Clean up buffer barriers a bit
This even fixes a couple of minor issues that snuck past validation.
This commit is contained in:
parent
dc9b64fadd
commit
785be9d340
7 changed files with 123 additions and 109 deletions
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@ -7,6 +7,12 @@ typedef struct {
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VkImageMemoryBarrier barrier;
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} qfv_imagebarrier_t;
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typedef struct {
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VkPipelineStageFlags srcStages;
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VkPipelineStageFlags dstStages;
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VkBufferMemoryBarrier barrier;
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} qfv_bufferbarrier_t;
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//XXX Note: imageBarriers and the enum must be kept in sync
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enum {
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qfv_LT_Undefined_to_TransferDst,
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@ -18,6 +24,15 @@ enum {
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qfv_LT_Undefined_to_Color,
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};
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//XXX Note: bufferBarriers and the enum must be kept in sync
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enum {
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qfv_BB_Unknown_to_TransferWrite,
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qfv_BB_TransferWrite_to_VertexAttrRead,
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qfv_BB_TransferWrite_to_IndexRead,
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qfv_BB_TransferWrite_to_UniformRead,
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};
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extern const qfv_imagebarrier_t imageBarriers[];
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extern const qfv_bufferbarrier_t bufferBarriers[];
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#endif//__QF_Vulkan_barrier_h
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@ -407,23 +407,17 @@ Vulkan_Mod_MakeAliasModelDisplayLists (mod_alias_ctx_t *alias_ctx, void *_m,
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header->poseverts = numverts;
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qfv_bufferbarrier_t bb = bufferBarriers[qfv_BB_Unknown_to_TransferWrite];
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VkBufferMemoryBarrier wr_barriers[] = {
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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vbuff, 0, vert_size},
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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uvbuff, 0, uv_size},
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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ibuff, 0, ind_size},
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bb.barrier, bb.barrier, bb.barrier,
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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wr_barriers[0].buffer = vbuff;
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wr_barriers[0].size = vert_size;
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wr_barriers[1].buffer = uvbuff;
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wr_barriers[1].size = uv_size;
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wr_barriers[2].buffer = ibuff;
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wr_barriers[2].size = ind_size;
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 3, wr_barriers, 0, 0);
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VkBufferCopy copy_region[] = {
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{ packet->offset, 0, vert_size },
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@ -436,23 +430,21 @@ Vulkan_Mod_MakeAliasModelDisplayLists (mod_alias_ctx_t *alias_ctx, void *_m,
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uvbuff, 1, ©_region[1]);
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dfunc->vkCmdCopyBuffer (packet->cmd, stage->buffer,
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ibuff, 1, ©_region[2]);
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// both qfv_BB_TransferWrite_to_VertexAttrRead and
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// qfv_BB_TransferWrite_to_IndexRead have the same stage flags
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bb = bufferBarriers[qfv_BB_TransferWrite_to_VertexAttrRead];
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VkBufferMemoryBarrier rd_barriers[] = {
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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vbuff, 0, vert_size },
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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uvbuff, 0, uv_size },
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_INDEX_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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ibuff, 0, ind_size },
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bufferBarriers[qfv_BB_TransferWrite_to_VertexAttrRead].barrier,
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bufferBarriers[qfv_BB_TransferWrite_to_VertexAttrRead].barrier,
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bufferBarriers[qfv_BB_TransferWrite_to_IndexRead].barrier,
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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rd_barriers[0].buffer = vbuff;
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rd_barriers[0].size = vert_size;
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rd_barriers[1].buffer = uvbuff;
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rd_barriers[1].size = uv_size;
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rd_barriers[2].buffer = ibuff;
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rd_barriers[2].size = ind_size;
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 3, rd_barriers, 0, 0);
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QFV_PacketSubmit (packet);
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QFV_DestroyStagingBuffer (stage);
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@ -133,3 +133,47 @@ const qfv_imagebarrier_t imageBarriers[] = {
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},
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},
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};
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const qfv_bufferbarrier_t bufferBarriers[] = {
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// unknown to transfer write
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{
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.srcStages = VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
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.dstStages = VK_PIPELINE_STAGE_TRANSFER_BIT,
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.barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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},
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},
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// transfer write to vertex attribute read
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{
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.srcStages = VK_PIPELINE_STAGE_TRANSFER_BIT,
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.dstStages = VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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.barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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},
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},
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// transfer write to index read
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{
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.srcStages = VK_PIPELINE_STAGE_TRANSFER_BIT,
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.dstStages = VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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.barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_INDEX_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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},
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},
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// transfer write to uniform read
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// note: not necessarily optimal as it uses vertex shader for dst
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{
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.srcStages = VK_PIPELINE_STAGE_TRANSFER_BIT,
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.dstStages = VK_PIPELINE_STAGE_VERTEX_SHADER_BIT,
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.barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_UNIFORM_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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},
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},
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};
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@ -581,29 +581,19 @@ Vulkan_BuildDisplayLists (model_t **models, int num_models, vulkan_ctx_t *ctx)
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bctx->vertex_buffer_size = vertex_buffer_size;
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}
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VkBufferMemoryBarrier wr_barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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bctx->vertex_buffer, 0, vertex_buffer_size,
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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0, 0, 0, 1, &wr_barrier, 0, 0);
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qfv_bufferbarrier_t bb = bufferBarriers[qfv_BB_Unknown_to_TransferWrite];
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bb.barrier.buffer = bctx->vertex_buffer;
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bb.barrier.size = vertex_buffer_size;
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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VkBufferCopy copy_region = { packet->offset, 0, vertex_buffer_size };
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dfunc->vkCmdCopyBuffer (packet->cmd, stage->buffer,
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bctx->vertex_buffer, 1, ©_region);
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VkBufferMemoryBarrier rd_barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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bctx->vertex_buffer, 0, vertex_buffer_size,
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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0, 0, 0, 1, &rd_barrier, 0, 0);
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bb = bufferBarriers[qfv_BB_TransferWrite_to_VertexAttrRead];
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bb.barrier.buffer = bctx->vertex_buffer;
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bb.barrier.size = vertex_buffer_size;
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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QFV_PacketSubmit (packet);
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QFV_DestroyStagingBuffer (stage);
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}
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@ -173,27 +173,19 @@ create_quad_buffers (vulkan_ctx_t *ctx)
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*ind++ = -1;
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}
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VkBufferMemoryBarrier wr_barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED, ibuf, 0, ind_size
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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0, 0, 0, 1, &wr_barrier, 0, 0);
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qfv_bufferbarrier_t bb = bufferBarriers[qfv_BB_Unknown_to_TransferWrite];
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bb.barrier.buffer = ibuf;
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bb.barrier.size = ind_size;
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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VkBufferCopy copy_region = { packet->offset, 0, ind_size };
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dfunc->vkCmdCopyBuffer (packet->cmd, ctx->staging->buffer, ibuf,
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1, ©_region);
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VkBufferMemoryBarrier rd_barrier = {
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VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_INDEX_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED, ibuf, 0, ind_size
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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0, 0, 0, 1, &rd_barrier, 0, 0);
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bb = bufferBarriers[qfv_BB_TransferWrite_to_IndexRead];
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bb.barrier.buffer = ibuf;
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bb.barrier.size = ind_size;
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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QFV_PacketSubmit (packet);
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}
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@ -50,6 +50,7 @@
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#include "QF/Vulkan/qf_lighting.h"
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#include "QF/Vulkan/qf_texture.h"
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#include "QF/Vulkan/barrier.h"
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#include "QF/Vulkan/buffer.h"
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#include "QF/Vulkan/debug.h"
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#include "QF/Vulkan/descriptor.h"
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@ -125,7 +126,7 @@ update_lights (vulkan_ctx_t *ctx)
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for (int i = 0; i < NUM_STYLES; i++) {
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light_data->intensity[i] = d_lightstylevalue[i] / 65536.0;
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}
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// dynamic lights seem a tad fiant, so 16x map lights
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// dynamic lights seem a tad faint, so 16x map lights
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light_data->intensity[64] = 1 / 16.0;
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light_data->intensity[65] = 1 / 16.0;
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light_data->intensity[66] = 1 / 16.0;
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@ -155,31 +156,21 @@ update_lights (vulkan_ctx_t *ctx)
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}
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}
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VkBufferMemoryBarrier wr_barriers[] = {
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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lframe->light_buffer, 0, sizeof (qfv_light_buffer_t) },
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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0, 0, 0, 1, wr_barriers, 0, 0);
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qfv_bufferbarrier_t bb = bufferBarriers[qfv_BB_Unknown_to_TransferWrite];
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bb.barrier.buffer = lframe->light_buffer;
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bb.barrier.size = sizeof (qfv_light_buffer_t);
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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VkBufferCopy copy_region[] = {
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{ packet->offset, 0, sizeof (qfv_light_buffer_t) },
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};
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dfunc->vkCmdCopyBuffer (packet->cmd, ctx->staging->buffer,
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lframe->light_buffer, 1, ©_region[0]);
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VkBufferMemoryBarrier rd_barriers[] = {
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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lframe->light_buffer, 0, sizeof (qfv_light_buffer_t) },
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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0, 0, 0, 1, rd_barriers, 0, 0);
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bb = bufferBarriers[qfv_BB_TransferWrite_to_UniformRead];
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bb.barrier.buffer = lframe->light_buffer;
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bb.barrier.size = sizeof (qfv_light_buffer_t);
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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QFV_PacketSubmit (packet);
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}
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@ -348,31 +348,21 @@ Vulkan_CreateRenderPass (vulkan_ctx_t *ctx)
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float *verts = QFV_PacketExtend (packet, sizeof (quad_vertices));
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memcpy (verts, quad_vertices, sizeof (quad_vertices));
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VkBufferMemoryBarrier wr_barriers[] = {
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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0, VK_ACCESS_TRANSFER_WRITE_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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ctx->quad_buffer, 0, sizeof (quad_vertices) },
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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0, 0, 0, 1, wr_barriers, 0, 0);
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qfv_bufferbarrier_t bb = bufferBarriers[qfv_BB_Unknown_to_TransferWrite];
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bb.barrier.buffer = ctx->quad_buffer;
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bb.barrier.size = sizeof (quad_vertices);
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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VkBufferCopy copy_region[] = {
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{ packet->offset, 0, sizeof (quad_vertices) },
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};
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dfunc->vkCmdCopyBuffer (packet->cmd, ctx->staging->buffer,
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ctx->quad_buffer, 1, ©_region[0]);
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VkBufferMemoryBarrier rd_barriers[] = {
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{ VK_STRUCTURE_TYPE_BUFFER_MEMORY_BARRIER, 0,
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VK_ACCESS_TRANSFER_WRITE_BIT, VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT,
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VK_QUEUE_FAMILY_IGNORED, VK_QUEUE_FAMILY_IGNORED,
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ctx->quad_buffer, 0, sizeof (quad_vertices) },
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};
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dfunc->vkCmdPipelineBarrier (packet->cmd,
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VK_PIPELINE_STAGE_TRANSFER_BIT,
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VK_PIPELINE_STAGE_VERTEX_INPUT_BIT,
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0, 0, 0, 1, rd_barriers, 0, 0);
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bb = bufferBarriers[qfv_BB_TransferWrite_to_VertexAttrRead];
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bb.barrier.buffer = ctx->quad_buffer;
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bb.barrier.size = sizeof (quad_vertices);
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dfunc->vkCmdPipelineBarrier (packet->cmd, bb.srcStages, bb.dstStages,
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0, 0, 0, 1, &bb.barrier, 0, 0);
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QFV_PacketSubmit (packet);
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}
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