oslibs, codecs: minor libmad update
git-svn-id: svn://svn.code.sf.net/p/quakespasm/code/trunk/quakespasm@701 af15c1b1-3010-417e-b628-4374ebc0bcbd
This commit is contained in:
Ozkan Sezer
parent
21070374b8
commit
c8e8eab69b
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@ -45,6 +45,8 @@ extern "C" {
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# define SIZEOF_LONG 8
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#endif
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#define SIZEOF_INT 4
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#define SIZEOF_LONG_LONG 8
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@ -341,11 +343,11 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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operand. If needed this code can also support Thumb-1
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(simply append "s" to the end of the second two instructions). */
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# define MAD_F_MLN(hi, lo) \
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asm ("rsbs %0, %2, #0\n\t" \
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asm ("rsbs %0, %0, #0\n\t" \
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"sbc %1, %1, %1\n\t" \
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"sub %1, %1, %3\n\t" \
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: "=&r" (lo), "=&r" (hi) \
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: "0" (lo), "1" (hi) \
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"sub %1, %1, %2" \
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: "+&r" (lo), "=&r" (hi) \
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: "r" (hi) \
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: "cc")
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#else /* ! __thumb__ */
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# define MAD_F_MLN(hi, lo) \
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@ -373,6 +375,15 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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# elif defined(FPM_MIPS)
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#if defined (__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4))
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typedef unsigned int u64_di_t __attribute__ ((mode (DI)));
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# define MAD_F_MLX(hi, lo, x, y) \
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do { \
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u64_di_t __ll = (u64_di_t) (x) * (y); \
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hi = __ll >> 32; \
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lo = __ll; \
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} while (0)
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#else
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/*
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* This MIPS version is fast and accurate; the disposition of the least
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* significant bit depends on OPT_ACCURACY via mad_f_scale64().
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@ -402,6 +413,7 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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: "%r" ((x) >> 12), "r" ((y) >> 16))
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# define MAD_F_MLZ(hi, lo) ((mad_fixed_t) (lo))
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# endif
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#endif /* MIPS / gcc-4.4. */
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# if defined(OPT_SPEED)
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# define mad_f_scale64(hi, lo) \
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@ -36,11 +36,10 @@ SDLNET ?= 0
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# ---------------------------------------
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CC ?= gcc
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WINDRES ?= windres
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STRIP ?= strip
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LINKER = $(CC)
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STRIP ?= strip
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#CPUFLAGS= -mtune=i686
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#CPUFLAGS= -march=pentium4
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#CPUFLAGS= -mtune=k8
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@ -38,10 +38,10 @@ SDLNET ?= 0
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# ---------------------------------------
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CC ?= gcc
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WINDRES ?= windres
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STRIP ?= strip
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LINKER = $(CC)
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LIPO ?= lipo
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STRIP ?= strip
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CPUFLAGS=
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# require 10.5 for 64 bit builds
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@ -46,10 +46,10 @@ TOOLCHAIN_PREFIX=
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endif
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CC = $(TOOLCHAIN_PREFIX)gcc
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WINDRES = $(TOOLCHAIN_PREFIX)windres
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STRIP = $(TOOLCHAIN_PREFIX)strip
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LINKER = $(CC)
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WINDRES = $(TOOLCHAIN_PREFIX)windres
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STRIP = $(TOOLCHAIN_PREFIX)strip
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#CPUFLAGS= -mtune=i686
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#CPUFLAGS= -march=pentium4
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@ -46,10 +46,10 @@ TOOLCHAIN_PREFIX=
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endif
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CC = $(TOOLCHAIN_PREFIX)gcc
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WINDRES = $(TOOLCHAIN_PREFIX)windres
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STRIP = $(TOOLCHAIN_PREFIX)strip
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LINKER = $(CC)
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WINDRES = $(TOOLCHAIN_PREFIX)windres
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STRIP = $(TOOLCHAIN_PREFIX)strip
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#CPUFLAGS= -mtune=k8
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#CPUFLAGS= -march=atom
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@ -44,11 +44,11 @@ extern "C" {
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# define SIZEOF_LONG 8
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# endif
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#endif
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#ifdef __powerpc__
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#if (defined(__ppc__) || defined(__POWERPC__) || defined(__powerpc__)) && !(defined(__ppc64__) || defined(__powerpc64__))
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# define FPM_PPC
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# define SIZEOF_LONG 4
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#endif
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#ifdef __powerpc64__
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#if defined(__ppc64__) || defined(__powerpc64__)
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# define FPM_PPC
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# define SIZEOF_LONG 8
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#endif
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@ -346,12 +346,25 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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: "+r" (lo), "+r" (hi) \
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: "%r" (x), "r" (y))
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#ifdef __thumb__
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/* In Thumb-2, the RSB-immediate instruction is only allowed with a zero
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operand. If needed this code can also support Thumb-1
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(simply append "s" to the end of the second two instructions). */
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# define MAD_F_MLN(hi, lo) \
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asm ("rsbs %0, %0, #0\n\t" \
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"sbc %1, %1, %1\n\t" \
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"sub %1, %1, %2" \
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: "+&r" (lo), "=&r" (hi) \
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: "r" (hi) \
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: "cc")
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#else /* ! __thumb__ */
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# define MAD_F_MLN(hi, lo) \
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asm ("rsbs %0, %2, #0\n\t" \
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"rsc %1, %3, #0" \
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: "=r" (lo), "=r" (hi) \
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: "=&r" (lo), "=r" (hi) \
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: "0" (lo), "1" (hi) \
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: "cc")
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#endif /* __thumb__ */
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# define mad_f_scale64(hi, lo) \
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({ mad_fixed_t __result; \
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@ -370,6 +383,15 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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# elif defined(FPM_MIPS)
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#if defined (__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 4))
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typedef unsigned int u64_di_t __attribute__ ((mode (DI)));
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# define MAD_F_MLX(hi, lo, x, y) \
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do { \
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u64_di_t __ll = (u64_di_t) (x) * (y); \
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hi = __ll >> 32; \
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lo = __ll; \
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} while (0)
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#else
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/*
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* This MIPS version is fast and accurate; the disposition of the least
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* significant bit depends on OPT_ACCURACY via mad_f_scale64().
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@ -399,6 +421,7 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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: "%r" ((x) >> 12), "r" ((y) >> 16))
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# define MAD_F_MLZ(hi, lo) ((mad_fixed_t) (lo))
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# endif
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#endif /* MIPS / gcc-4.4. */
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# if defined(OPT_SPEED)
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# define mad_f_scale64(hi, lo) \
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@ -450,8 +473,8 @@ mad_fixed_t mad_f_mul_inline(mad_fixed_t x, mad_fixed_t y)
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asm ("addc %0,%2,%3\n\t" \
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"adde %1,%4,%5" \
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: "=r" (lo), "=r" (hi) \
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: "%r" (lo), "r" (__lo), \
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"%r" (hi), "r" (__hi) \
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: "0" (lo), "r" (__lo), \
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"1" (hi), "r" (__hi) \
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: "xer"); \
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})
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# endif
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