mirror of
https://github.com/DarkPlacesEngine/gmqcc.git
synced 2024-11-23 20:33:05 +00:00
Faster hashing reaching 16 GB/s on Phenom II X4.
This commit is contained in:
Dale Weiler
parent
58cd326d85
commit
4d4851e179
6 changed files with 467 additions and 132 deletions
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@ -115,6 +115,7 @@ exec.o: gmqcc.h opts.def
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fold.o: ast.h ir.h gmqcc.h opts.def parser.h lexer.h
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fs.o: gmqcc.h opts.def platform.h
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ftepp.o: gmqcc.h opts.def lexer.h
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hash.o: gmqcc.h opts.def
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intrin.o: parser.h gmqcc.h opts.def lexer.h ast.h ir.h
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ir.o: gmqcc.h opts.def ir.h
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lexer.o: gmqcc.h opts.def lexer.h
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1
Makefile
1
Makefile
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@ -143,6 +143,7 @@ install-doc:
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ansi.o: platform.h gmqcc.h opts.def
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util.o: gmqcc.h opts.def platform.h
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hash.o: gmqcc.h opts.def
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stat.o: gmqcc.h opts.def
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fs.o: gmqcc.h opts.def platform.h
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opts.o: gmqcc.h opts.def
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1
gmqcc.h
1
gmqcc.h
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@ -239,6 +239,7 @@ const char *util_ctime (const time_t *timer);
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typedef struct fs_file_s fs_file_t;
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bool util_isatty(fs_file_t *);
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size_t hash(const char *key);
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/*
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* A flexible vector implementation: all vector pointers contain some
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460
hash.c
Normal file
460
hash.c
Normal file
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@ -0,0 +1,460 @@
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/*
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* Copyright (C) 2012, 2013
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* Dale Weiler
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is furnished to do
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* so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "gmqcc.h"
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#include <limits.h>
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/*
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* This is a version of the Murmur3 hashing function optimized for various
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* compilers/architectures. It uses the traditional Murmur2 mix stagin
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* but fixes the mix staging inner loops.
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*
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* Murmur 2 contains an inner loop such as:
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* while (l >= 4) {
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* u32 k = *(u32*)d;
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* k *= m;
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* k ^= k >> r;
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* k *= m;
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*
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* h *= m;
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* h ^= k;
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* d += 4;
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* l -= 4;
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* }
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*
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* The two u32s that form the key are the same value for x
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* this premix stage will perform the same results for both values. Unrolled
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* this produces just:
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* x *= m;
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* x ^= x >> r;
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* x *= m;
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*
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* h *= m;
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* h ^= x;
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* h *= m;
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* h ^= x;
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*
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* This appears to be fine, except what happens when m == 1? well x
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* cancels out entierly, leaving just:
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* x ^= x >> r;
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* h ^= x;
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* h ^= x;
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*
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* So all keys hash to the same value, but how often does m == 1?
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* well, it turns out testing x for all possible values yeilds only
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* 172,013,942 unique results instead of 2^32. So nearly ~4.6 bits
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* are cancelled out on average!
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*
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* This means we have a 14.5% higher chance of collision. This is where
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* Murmur3 comes in to save the day.
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*/
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#ifdef __GNUC__
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# pragma GCC diagnostic push
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# pragma GCC diagnostic ignored "-Wattributes"
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#endif
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/*
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* Some rotation tricks:
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* MSVC one shaves off six instructions, where GCC optimized one for
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* x86 and amd64 shaves off four instructions. Native methods are often
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* optimized rather well at -O3, but not at -O2.
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*/
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#if defined(_MSC_VER)
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# define HASH_ROTL32(X, Y) _rotl((X), (Y))
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#else
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static GMQCC_FORCEINLINE uint32_t hash_rotl32(volatile uint32_t x, int8_t r) {
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#if defined (__GNUC__) && (defined(__i386__) || defined(__amd64__))
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__asm__ __volatile__ ("roll %1,%0" : "+r"(x) : "c"(r));
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return x;
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#else /* ! (defined(__GNUC__) && (defined(__i386__) || defined(__amd64__))) */
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return (x << r) | (x >> (32 - r));
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#endif
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}
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# define HASH_ROTL32(X, Y) hash_rotl32((volatile uint32_t)(X), (Y))
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#endif /* !(_MSC_VER) */
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static GMQCC_FORCEINLINE uint32_t hash_mix32(uint32_t hash) {
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hash ^= hash >> 16;
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hash *= 0x85EBCA6B;
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hash ^= hash >> 13;
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hash *= 0xC2B2AE35;
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hash ^= hash >> 16;
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return hash;
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}
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/*
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* These constants were calculated with SMHasher to determine the best
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* case senario for Murmur3:
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* http://code.google.com/p/smhasher/
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*/
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#define HASH_MASK1 0xCC9E2D51
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#define HASH_MASK2 0x1B873593
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#define HASH_SEED 0x9747B28C
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#if PLATFORM_BYTE_ORDER == GMQCC_BYTE_ORDER_LITTLE
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# define HASH_NATIVE_SAFEREAD(PTR) (*((uint32_t*)(PTR)))
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#elif PLATFORM_BYTE_ORDER == GMQCC_BYTE_ORDER_BIG
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# if defined(__GNUC__) && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR >= 3))
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# define HASH_NATIVE_SAFEREAD(PTR) (__builtin_bswap32(*((uint32_t*)(PTR))))
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# endif
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#endif
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/* Process individual bytes at this point since the endianess isn't known. */
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#ifndef HASH_NATIVE_SAFEREAD
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# define HASH_NATIVE_SAFEREAD(PTR) ((PTR)[0] | (PTR)[1] << 8 | (PTR)[2] << 16 | (PTR)[3] << 24)
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#endif
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#define HASH_NATIVE_BLOCK(H, K) \
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do { \
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K *= HASH_MASK1; \
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K = HASH_ROTL32(K, 15); \
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K *= HASH_MASK2; \
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H ^= K; \
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H = HASH_ROTL32(H, 13); \
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H = H * 5 + 0xE6546B64; \
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} while (0)
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#define HASH_NATIVE_BYTES(COUNT, H, C, N, PTR, LENGTH) \
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do { \
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int i = COUNT; \
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while (i--) { \
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C = C >> 8 | *PTR++ << 24; \
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N++; \
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LENGTH--; \
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if (N == 4) { \
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HASH_NATIVE_BLOCK(H, C); \
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N = 0; \
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} \
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} \
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} while (0)
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/*
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* Highly unrolled at per-carry bit granularity instead of per-block granularity. This will achieve the
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* highest possible instruction level parallelism.
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*/
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static GMQCC_FORCEINLINE void hash_native_process(uint32_t *ph1, uint32_t *carry, const void *key, int length) {
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uint32_t h1 = *ph1;
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uint32_t c = *carry;
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const uint8_t *ptr = (uint8_t*)key;
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const uint8_t *end;
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/* carry count from low 2 bits of carry value */
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int n = c & 3;
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/*
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* Unaligned word accesses are safe in LE. Thus we can obtain a little
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* more speed.
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*/
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# if PLATFORM_BYTE_ORDER == GMQCC_BYTE_ORDER_LITTLE
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/* Consume carry bits */
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int it = (4 - n) & 3;
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if (it && it <= length)
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HASH_NATIVE_BYTES(it, h1, c, n, ptr, length);
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/* word size chunk consumption */
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end = ptr + length/4*4;
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for (; ptr < end; ptr += 4) {
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uint32_t k1 = HASH_NATIVE_SAFEREAD(ptr);
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HASH_NATIVE_BLOCK(h1, k1);
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}
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# else
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/*
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* Unsafe to assume unaligned word accesses. Thus we'll need to consume
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* to alignment then process in aligned block chunks.
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*/
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uint32_t k1;
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int it = -(long)ptr & 3;
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if (it && it <= length)
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HASH_NATIVE_BYTES(it, h1, c, n, ptr, length);
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/*
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* Alignment has been reached, deal with aligned blocks, specializing for
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* all possible carry counts.
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*/
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end = ptr + len / 4 * 4;
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switch (n) {
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case 0:
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for (; ptr < end; ptr += 4) {
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k1 = HASH_NATIVE_SAFEREAD(ptr);
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HASH_NATIVE_BLOCK(h1, k1);
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}
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break;
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case 1:
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for (; ptr < end; ptr += 4) {
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k1 = c >> 24;
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c = HASH_NATIVE_SAFEREAD(ptr);
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k1 |= c << 8;
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HASH_NATIVE_BLOCK(h1, k1);
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}
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break;
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case 2:
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for (; ptr < end; ptr += 4) {
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k1 = c >> 16;
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c = HASH_NATIVE_SAFEREAD(ptr);
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k1 |= c << 16;
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HASH_NATIVE_BLOCK(h1, k1);
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}
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break;
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case 3:
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for (; ptr < end; ptr += 4) {
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k1 = c >> 8;
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c = HASH_NATIVE_SAFEREAD(ptr);
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k1 |= c << 24;
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HASH_NATIVE_BLOCK(h1, k1);
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}
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break;
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}
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#endif /* misaligned reads */
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/*
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* Advanced over 32-bit chunks, this can possibly leave 1..3 bytes of
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* additional trailing content to process.
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*/
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length -= length/4*4;
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HASH_NATIVE_BYTES(length, h1, c, n, ptr, length);
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*ph1 = h1;
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*carry = (c & ~0xFF) | n;
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}
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static GMQCC_FORCEINLINE uint32_t hash_native_result(uint32_t hash, uint32_t carry, size_t length) {
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uint32_t k1;
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int n = carry & 3;
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if (GMQCC_LIKELY(n)) {
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k1 = carry >> (4 - n) * 8;
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k1 *= HASH_MASK1;
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k1 = HASH_ROTL32(k1, 15);
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k1 *= HASH_MASK2;
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hash ^= k1;
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}
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hash ^= length;
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hash = hash_mix32(hash);
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return hash;
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}
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static GMQCC_FORCEINLINE uint32_t hash_native(const void *GMQCC_RESTRICT key, size_t length) {
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uint32_t hash = HASH_SEED;
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uint32_t carry = 0;
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/* Seperate calls for inliner to deal with */
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hash_native_process(&hash, &carry, key, length);
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return hash_native_result(hash, carry, length);
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}
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/*
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* Inline assembly optimized SSE version for when SSE is present via CPUID
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* or the host compiler has __SSE__. This is about 16 cycles faster than
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* native at -O2 for GCC and 11 cycles for -O3.
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*
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* Tested with -m32 on a Phenom II X4 with:
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* gcc version 4.8.1 20130725 (prerelease) (GCC)
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*/
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#if defined(__GNUC__) && defined(__i386__)
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static GMQCC_FORCEINLINE uint32_t hash_sse(const void *GMQCC_RESTRICT key, size_t length) {
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uint32_t ret;
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__asm__ __volatile__ (
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" mov %%eax, %%ebx\n"
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" mov %2, %%eax\n"
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" movd %%eax, %%xmm7\n"
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" shufps $0, %%xmm7, %%xmm7\n"
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" mov %3, %%eax\n"
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" movd %%eax, %%xmm6\n"
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" shufps $0, %%xmm6, %%xmm6\n"
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" lea (%%esi, %%ecx, 1), %%edi\n"
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" jmp 2f\n"
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"1:\n"
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" movaps (%%esi), %%xmm0\n"
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" pmulld %%xmm7, %%xmm0\n"
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" movaps %%xmm0, %%xmm2\n"
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" pslld $15, %%xmm0\n"
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" psrld $17, %%xmm2\n"
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" orps %%xmm2, %%xmm0\n"
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" pmulld %%xmm6, %%xmm0\n"
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" movd %%xmm0, %%eax\n"
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" xor %%eax, %%ebx\n"
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" rol $13, %%ebx\n"
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" imul $5, %%ebx\n"
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" add $0xE6546B64, %%ebx\n"
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" shufps $0x39, %%xmm0, %%xmm0\n"
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" movd %%xmm0, %%eax\n"
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" xor %%eax, %%ebx\n"
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" rol $13, %%ebx\n"
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" imul $5, %%ebx\n"
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" add $0xE6546B64, %%ebx\n"
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" shufps $0x39, %%xmm0, %%xmm0\n"
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" movd %%xmm0, %%eax\n"
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" xor %%eax, %%ebx\n"
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" rol $13, %%ebx\n"
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" imul $5, %%ebx\n"
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" add $0xE6546B64, %%ebx\n"
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" shufps $0x39, %%xmm0, %%xmm0\n"
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" movd %%xmm0, %%eax\n"
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" xor %%eax, %%ebx\n"
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" rol $13, %%ebx\n"
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" imul $5, %%ebx\n"
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" add $0xE6546B64, %%ebx\n"
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" add $16, %%esi\n"
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"2:\n"
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" cmp %%esi, %%edi\n"
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" jne 1b\n"
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" xor %%ecx, %%ebx\n"
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" mov %%ebx, %%eax\n"
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" shr $16, %%ebx\n"
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" xor %%ebx, %%eax\n"
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" imul $0x85EBCA6b, %%eax\n"
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" mov %%eax, %%ebx\n"
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" shr $13, %%ebx\n"
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" xor %%ebx, %%eax\n"
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" imul $0xC2B2AE35, %%eax\n"
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" mov %%eax, %%ebx\n"
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" shr $16, %%ebx\n"
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" xor %%ebx, %%eax\n"
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: "=a" (ret)
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: "a" (HASH_SEED),
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"i" (HASH_MASK1),
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"i" (HASH_MASK2),
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"S" (key),
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"c" (length)
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: "%ebx",
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"%edi"
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);
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return ret;
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}
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#endif
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#if defined (__GNUC__) && defined(__i386__)
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/*
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* Emulate MSVC _cpuid intrinsic for GCC/MinGW/Clang, this will be used
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* to determine if we should use the SSE route.
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*/
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static GMQCC_FORCEINLINE void hash_cpuid(int *lanes, int entry) {
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__asm__ __volatile__ (
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"cpuid"
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: "=a"(lanes[0]),
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"=b"(lanes[1]),
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"=c"(lanes[2]),
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"=d"(lanes[3])
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: "a" (entry)
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);
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}
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#endif /* !(defined(__GNUC__) && defined(__i386__) */
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static uint32_t hash_entry(const void *GMQCC_RESTRICT key, size_t length) {
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/*
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* No host SSE instruction set assumed do runtime test instead. This
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* is for MinGW32 mostly which doesn't define SSE.
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||||
*/
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#if defined (__GNUC__) && defined(__i386__) && !defined(__SSE__)
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static bool memoize = false;
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static bool sse = false;
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if (GMQCC_UNLIKELY(!memoize)) {
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/*
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* Only calculate SSE one time, thus it's unlikely that this branch
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* is taken more than once.
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*/
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static int lanes[4];
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hash_cpuid(lanes, 0);
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/*
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* It's very likely that lanes[0] will contain a value unless it
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* isn't a modern x86.
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*/
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if (GMQCC_LIKELY(*lanes >= 1))
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sse = (lanes[3] & ((int)1 << 25)) != 0;
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memoize = true;
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}
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return (GMQCC_LIKELY(sse))
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? hash_sse(key, length);
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: hash_native(key, length);
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/*
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* Same as above but this time host compiler was defined with SSE support.
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* This handles MinGW32 builds for i686+
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||||
*/
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#elif defined (__GNUC__) && defined(__i386__) && defined(__SSE__)
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return hash_sse(key, length);
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#else
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||||
/*
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||||
* Go the native route which itself is highly optimized as well for
|
||||
* unaligned load/store when dealing with LE.
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||||
*/
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return hash_native(key, length);
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#endif
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||||
}
|
||||
|
||||
#define HASH_LEN_ALIGN (sizeof(size_t))
|
||||
#define HASH_LEN_ONES ((size_t)-1/UCHAR_MAX)
|
||||
#define HASH_LEN_HIGHS (HASH_LEN_ONES * (UCHAR_MAX / 2 + 1))
|
||||
#define HASH_LEN_HASZERO(X) (((X)-HASH_LEN_ONES) & ~(X) & HASH_LEN_HIGHS)
|
||||
|
||||
size_t hash(const char *key) {
|
||||
const char *s = key;
|
||||
const char *a = s;
|
||||
const size_t *w;
|
||||
|
||||
/* Align for fast staging */
|
||||
for (; (uintptr_t)s % HASH_LEN_ALIGN; s++) {
|
||||
/* Quick stage if terminated before alignment */
|
||||
if (!*s)
|
||||
return hash_entry(key, s-a);
|
||||
}
|
||||
|
||||
/*
|
||||
* Efficent staging of words for string length calculation, this is
|
||||
* faster than ifunc resolver of strlen call.
|
||||
*
|
||||
* On a x64 this becomes literally two masks, and a quick skip through
|
||||
* bytes along the string with the following masks:
|
||||
* movabs $0xFEFEFEFEFEFEFEFE,%r8
|
||||
* movabs $0x8080808080808080,%rsi
|
||||
*/
|
||||
for (w = (const void *)s; !HASH_LEN_HASZERO(*w); w++);
|
||||
for (s = (const void *)w; *s; s++);
|
||||
|
||||
return hash_entry(key, s-a);
|
||||
}
|
||||
|
||||
#undef HASH_LEN_HASZERO
|
||||
#undef HASH_LEN_HIGHS
|
||||
#undef HASH_LEN_ONES
|
||||
#undef HASH_LEN_ALIGN
|
||||
#undef HASH_SEED
|
||||
#undef HASH_MASK2
|
||||
#undef HASH_MASK1
|
||||
#undef HASH_ROTL32
|
||||
#undef HASH_NATIVE_BLOCK
|
||||
#undef HASH_NATIVE_BYTES
|
||||
#undef HASH_NATIVE_SAFEREAD
|
||||
|
||||
#ifdef __GNUC__
|
||||
# pragma GCC diagnostic pop
|
||||
#endif
|
||||
|
|
@ -14,7 +14,7 @@ LDFLAGS +=
|
|||
LIBS += -lm
|
||||
|
||||
#common objects
|
||||
COMMON = ansi.o util.o stat.o fs.o opts.o conout.o
|
||||
COMMON = ansi.o util.o hash.o stat.o fs.o opts.o conout.o
|
||||
|
||||
#objects
|
||||
OBJ_C = $(COMMON) main.o lexer.o parser.o code.o ast.o ir.o ftepp.o utf8.o correct.o fold.o intrin.o
|
||||
|
|
|
|||
134
stat.c
134
stat.c
|
|
@ -353,139 +353,11 @@ typedef struct hash_node_t {
|
|||
struct hash_node_t *next; /* next node (linked list) */
|
||||
} hash_node_t;
|
||||
|
||||
/*
|
||||
* This is a patched version of the Murmur2 hashing function to use
|
||||
* a proper pre-mix and post-mix setup. Infact this is Murmur3 for
|
||||
* the most part just reinvented.
|
||||
*
|
||||
* Murmur 2 contains an inner loop such as:
|
||||
* while (l >= 4) {
|
||||
* u32 k = *(u32*)d;
|
||||
* k *= m;
|
||||
* k ^= k >> r;
|
||||
* k *= m;
|
||||
*
|
||||
* h *= m;
|
||||
* h ^= k;
|
||||
* d += 4;
|
||||
* l -= 4;
|
||||
* }
|
||||
*
|
||||
* The two u32s that form the key are the same value x (pulled from data)
|
||||
* this premix stage will perform the same results for both values. Unrolled
|
||||
* this produces just:
|
||||
* x *= m;
|
||||
* x ^= x >> r;
|
||||
* x *= m;
|
||||
*
|
||||
* h *= m;
|
||||
* h ^= x;
|
||||
* h *= m;
|
||||
* h ^= x;
|
||||
*
|
||||
* This appears to be fine, except what happens when m == 1? well x
|
||||
* cancels out entierly, leaving just:
|
||||
* x ^= x >> r;
|
||||
* h ^= x;
|
||||
* h ^= x;
|
||||
*
|
||||
* So all keys hash to the same value, but how often does m == 1?
|
||||
* well, it turns out testing x for all possible values yeilds only
|
||||
* 172,013,942 unique results instead of 2^32. So nearly ~4.6 bits
|
||||
* are cancelled out on average!
|
||||
*
|
||||
* This means we have a 14.5% (rounded) chance of colliding more, which
|
||||
* results in another bucket/chain for the hashtable.
|
||||
*
|
||||
* We fix it buy upgrading the pre and post mix ssystems to align with murmur
|
||||
* hash 3.
|
||||
*/
|
||||
#if 1
|
||||
#define GMQCC_ROTL32(X, R) (((X) << (R)) | ((X) >> (32 - (R))))
|
||||
|
||||
size_t hash(const char *key);
|
||||
size_t util_hthash(hash_table_t *ht, const char *key) {
|
||||
const unsigned char *data = (const unsigned char *)key;
|
||||
const size_t len = strlen(key);
|
||||
const size_t block = len / 4;
|
||||
const uint32_t mask1 = 0xCC9E2D51;
|
||||
const uint32_t mask2 = 0x1B873593;
|
||||
const uint32_t *blocks = (const uint32_t*)(data + block * 4);
|
||||
const unsigned char *tail = (const unsigned char *)(data + block * 4);
|
||||
|
||||
size_t i;
|
||||
uint32_t k;
|
||||
uint32_t h = 0x1EF0 ^ len;
|
||||
|
||||
for (i = -((int)block); i; i++) {
|
||||
k = blocks[i];
|
||||
k *= mask1;
|
||||
k = GMQCC_ROTL32(k, 15);
|
||||
k *= mask2;
|
||||
h ^= k;
|
||||
h = GMQCC_ROTL32(h, 13);
|
||||
h = h * 5 + 0xE6546B64;
|
||||
}
|
||||
|
||||
k = 0;
|
||||
switch (len & 3) {
|
||||
case 3:
|
||||
k ^= tail[2] << 16;
|
||||
case 2:
|
||||
k ^= tail[1] << 8;
|
||||
case 1:
|
||||
k ^= tail[0];
|
||||
k *= mask1;
|
||||
k = GMQCC_ROTL32(k, 15);
|
||||
k *= mask2;
|
||||
h ^= k;
|
||||
}
|
||||
|
||||
h ^= len;
|
||||
h ^= h >> 16;
|
||||
h *= 0x85EBCA6B;
|
||||
h ^= h >> 13;
|
||||
h *= 0xC2B2AE35;
|
||||
h ^= h >> 16;
|
||||
|
||||
return (size_t) (h % ht->size);
|
||||
return hash(key) % ht->size;
|
||||
}
|
||||
#undef GMQCC_ROTL32
|
||||
#else
|
||||
/* We keep the old for reference */
|
||||
GMQCC_INLINE size_t util_hthash(hash_table_t *ht, const char *key) {
|
||||
const uint32_t mix = 0x5BD1E995;
|
||||
const uint32_t rot = 24;
|
||||
size_t size = strlen(key);
|
||||
uint32_t hash = 0x1EF0 /* LICRC TAB */ ^ size;
|
||||
uint32_t alias = 0;
|
||||
const unsigned char *data = (const unsigned char*)key;
|
||||
|
||||
while (size >= 4) {
|
||||
alias = (data[0] | (data[1] << 8) | (data[2] << 16) | (data[3] << 24));
|
||||
alias *= mix;
|
||||
alias ^= alias >> rot;
|
||||
alias *= mix;
|
||||
|
||||
hash *= mix;
|
||||
hash ^= alias;
|
||||
|
||||
data += 4;
|
||||
size -= 4;
|
||||
}
|
||||
|
||||
switch (size) {
|
||||
case 3: hash ^= data[2] << 16;
|
||||
case 2: hash ^= data[1] << 8;
|
||||
case 1: hash ^= data[0];
|
||||
hash *= mix;
|
||||
}
|
||||
|
||||
hash ^= hash >> 13;
|
||||
hash *= mix;
|
||||
hash ^= hash >> 15;
|
||||
|
||||
return (size_t) (hash % ht->size);
|
||||
}
|
||||
#endif
|
||||
|
||||
static hash_node_t *_util_htnewpair(const char *key, void *value) {
|
||||
hash_node_t *node;
|
||||
|
|
|
|||
Loading…
Reference in a new issue